[News] Intensified Competition in the Semiconductor Industry for 2nm Technology Dominance, Potentially Reshaping the Global Foundry Market

The competition for dominance in 2nm semiconductor technology has intensified at the beginning of 2024, marking a crucial battleground among global foundry companies.

As per a report from IJIWEI, major foundry enterprises such as Samsung Electronics, TSMC, and Intel are set to commence mass production adopting 2nm process starting this year. Consequently, the fierce competition for supremacy in 2nm technology is expected to escalate from 2025 onwards. Currently, the most advanced production technology globally is at the 3nm level.

  • TSMC

TSMC’s 2nm products will be manufactured at the Fab 20 in the Hsinchu Science Park in northern Taiwan and at a plant in Kaohsiung.

The Fab 20 facility is expected to begin receiving related equipment for 2nm production as early as April, with plans to transition to GAA (Gate-All-Around) technology from FinFET for 2nm mass production by 2025.

During TSMC’s earnings call on January 18th, TSMC revealed that its capital expenditure for this year is expected to fall between USD 28 billion and 32 billion, with the majority (70% to 80%) allocated to advanced processes. This figure is similar to that of 2023 (USD 30.4 billion), indicating stable investment to ensure its leading position in 2nm technology.

  • Intel

After announcing its re-entry into the foundry business, Intel is actively advancing its foundry construction efforts. The plan includes the introduction of the Intel 20A (equivalent to 2nm) process in the first half of 2024 and the Intel 18A (1.8nm) process in the second half of the year. It is understood that the Intel 18A process will commence test production as early as the first quarter of this year.

Intel’s 2nm roadmap is more ambitious than originally anticipated, being accelerated by over six months. In response to criticisms of its “overly ambitious” plans, Intel swiftly began procuring advanced Extreme Ultraviolet (EUV) equipment.

  • Samsung Electronics

Samsung Electronics has devised a strategy to gain an advantage in the more advanced process war through its Gate-All-Around (GAA) technology. Currently, it is mass-producing the first-generation 3nm process based on GAA (SF3E) and plans to commence mass production of the second-generation 3nm process this year, significantly enhancing performance and power efficiency.

Regarding the 2nm process, per a report from Nikkei, Samsung plans to start mass production for mobile devices in 2025 (SF2) and gradually expand to high-performance computing (HPC) in 2026 and automotive processes in 2027.

Currently, Samsung Electronics is producing GAA products for the 3nm process at its Hwaseong plant and plans to manufacture products for both the 3nm and 2nm processes at its Pyeongtaek facility in the future.

  • Rapidus

Rapidus, a chip manufacturing company supported by the Japanese government, is expected to trial-adopt 2nm process at its new plant by 2025 and begin mass production from 2027.

If Rapidus’ technology is validated, the global foundry market may expand beyond the Taiwan-Korea duopoly to include Taiwan, Korea, the United States, and Japan.

The technology competition to become a “game-changer” ultimately depends on the competition for customers. It’s rumored that TSMC holds a leading position in the 2nm field, with Apple speculated to be its first customer for the 2nm process. Graphics processing giant NVIDIA is also considered a major customer within TSMC’s client base.

According to TrendForce data as of the third quarter of 2023, TSMC’s revenue share accounted for a dominant 57.9%, with Samsung Electronics trailing at 12.4%, a gap of 45.5 percentage points.

However, Samsung Electronics is not sitting idly by. With continuous technological investment, Samsung’s foundry customer base grew to over 100 in 2022, a 2.4-fold increase from 2017. The company aims to expand this number to around 200 by 2028.

Particularly, Samsung’s early adoption of GAA technology is expected to give it an advantage in achieving early production volumes for advanced processes.

Read more

(Photo credit: TSMC)

Please note that this article cites information from IJIWEI and Nikkei.


[News] TSMC’s Primary Client for 2nm Chips Expected to be Apple, Set to Debut with iPhone 17 Lineup Next Year

Previously, TSMC has indicated that TSMC’s 2nm process will be deployed as scheduled in the second half of 2025, indicating that before that, the most advanced chips in the market will be produced using TSMC’s 3nm process. Apple, which has consistently been the first to adopt TSMC’s latest process, is set to be the first to adopt TSMC’s latest 2nm process.

▲ TSMC’s Layout of Global Production Capacity Edited by TrendForce, November, 2023

According to a report from the media outlet wccftech, Apple’s iPhone, Mac, iPad, and other devices will be the first users of TSMC’s 2nm process. Apple will leverage TSMC’s 2nm process technology to enhance chip performance and reduce power consumption. This advancement is expected to result in longer battery life for future Apple products, such as the iPhone and MacBook.

Currently, Apple’s chips designed for products like MacBook, iPad, and iPad Pro are produced using TSMC’s 3nm process technology. In 2023, the company announced the inclusion of the M3 Pro and M3 Max chips in the new MacBook Pro models. 

Additionally, TSMC will utilize new technology based on the GAAFET (Gate-All-Around Field-Effect Transistor) transistors instead of the traditional FinFET. While this new architecture makes the manufacturing process more complex, it also brings advantages such as smaller transistor sizes and lower power consumption.

In terms of performance analysis, Apple’s current chips are transitioning from the 5nm process to the 3nm process. This transition has resulted in a 10% increase in CPU performance and a 20% increase in GPU performance.

For now, TSMC is actively planning the capacity for future 2nm process technology through the construction of two new factories. Additionally, TSMC will utilize new technology based on the GAAFET (Gate-All-Around Field-Effect Transistor) architecture instead of the traditional FinFET architecture.

While this new architecture makes the manufacturing process more complex, it also brings advantages such as smaller transistor sizes and lower power consumption.

The report further indicates that Apple is expected to adopt the 2nm process for chip production in the iPhone 17 by 2025. Additionally, the same technology will also be applicable to the production of Mac’s M-series chips. 

Furthermore, as TSMC is quietly developing 1.4nm process, it is expected to be unveiled in 2027. This development means that, like the 2nm process technology, Apple could potentially be the first company to receive the latest process technology from TSMC for chip production, whether it’s 1.4nm or 2nm.

Read more

(Photo credit: NVIDIA)

Please note that this article cites information from wccftech.


[News] TSMC Actively Increases 2-Nanometer Production Capacity Planning, Market Expects Explosive Demand

TSMC announced during its briefing on the 18th that, due to robust demand in the 2-nanometer market, it plans to add another fab to the initially planned two fabs in Kaohsiung.

The company intends to use the 2-nanometer process for all three fabs in Kaohsiung, in addition to the originally planned 2-nanometer fab in Hsinchu’s Baoshan. Furthermore, the land recently acquired in Hsinchu Science Park will also be designated for a 2-nanometer fab. This reflects the strong preference for the 2-nanometer process among customers and underscores TSMC’s confidence in its in-house 2-nanometer process technology.

According to a report by TechNews following the briefing on the 18th, TSMC’s CFO Wendell Huang, stated in a media gathering that the strong demand in the high-performance computing and smartphone markets prompted the decision to increase the number of fabs in Kaohsiung from the originally planned two to three. Once the three 2-nanometer fabs are in full production, Kaohsiung will become a crucial manufacturing hub for TSMC’s 2-nanometer process.

In addition, with the recent approval from the Ministry of the Interior’s Urban Planning Commission, the land in Hsinchu Science Park designated for TSMC’s use, expected to be available in June 2024, is also being planned for a 2-nanometer fab.

Recent market reports suggest that TSMC, the leading semiconductor foundry, is set to proceed as scheduled with its plan to adopt the GAA (Gate-All-Around) architecture from the 2-nanometer process onward.

The P1 wafer fab in Baoshan, located in the Hsinchu Science Park, is anticipated to begin equipment installation as early as April 2024, while the Kaohsiung fab is projected to commence production using the GAA architecture for the 2-nanometer process technology in 2025.

Furthermore, in response to Intel securing the first High-NA EUV exposure equipment from ASML for its 18A advanced process, TSMC has indicated that it is also planning for High-NA EUV exposure equipment. However, the current timeline anticipates engineering verification of the High-NA EUV exposure equipment in 2024, with gradual integration into the manufacturing process set to follow.

(Image: TSMC)

Please note that this article cites information from TechNews

[News] Intense Competition with Samsung and Intel in Advanced Processes; TSMC Speeds Up 2nm Progress

The global foundry advanced process battle is reigniting, as reported by the Commercial Times. TSMC’s 2-nanometer process at the Baoshan P1 wafer fab in Hsinchu is set to commence equipment installation as early as April, incorporating a new Gate-All-Around (GAA) transistor architecture and aiming for mass production in 2025.

Additionally, expansion plans for Baoshan P2 and the Kaohsiung fab are projected to join in 2025, with evaluations underway for Phase 2 in the Central Taiwan Science Park. The competition with Samsung and Intel in the most advanced process is intensifying.

Semiconductor industry sources note the ongoing progress in global foundry advanced processes, with Samsung entering GAA architecture early at 3 nanometers, though facing yield challenges, while Intel anticipates mass production of its RibbonFET architecture at 20A this year.

In response to fierce competition, TSMC must accelerate its pace. The ‘Gate-All-Around’ (GAA) technology is a critical factor determining whether chip processing power will double within 1.5 to 2 years.

As per the report, Samsung’s attempt to lead in the 3-nanometer chip segment, transitioning from traditional FinFET, has faced stability issues in yield, hampering customer adoption, and giving TSMC confidence in its 3-nanometer progress. This also highlights the increased complexity in transitioning from 2D to 3D chip designs with GAA transistor architecture.

Furthermore, Intel is intensifying its efforts to catch up, planning to launch Intel 20A in the first half of the year and Intel 18A in the second half. However, it is speculated that Intel 20A will be exclusively used for Intel’s own products, maintaining a close collaboration with TSMC.

TSMC, adopting a cautious approach, benefits from a more advantageous cost structure by minimizing changes in production tools within the same process technology and manufacturing flow. For customers, altering designs during advanced process development incurs significant time and economic costs.

Supply chain sources reveal that TSMC finalized various parameters for its 2-nanometer process at the end of last year, confirming specialty gases and equipment. Contracts are gradually being signed, with equipment installation at the Baoshan P1 fab scheduled to commence in April. Equipment industry sources suggest that TSMC’s process advancement is progressing rapidly as expected, speculating that there will be updates on the Baoshan P2 fab later this year.

(Image: TSMC)

Please note that this article cites information from Commercial Times

[News] TSMC Grants Special Contribution Bonuses, as TSMC’s 2nm Process Potentially Seen Breakthrough

With the successful mass production of TSMC’s 3nm process and preparations for the upcoming 2nm process, recent reports suggest that TSMC has awarded a special contribution bonus to its research and development team in December, acknowledging the hard work of its employees.

In response to the news about the special contribution bonuses in December, TSMC stated that the company has always upheld the belief that “employees are the company’s most important assets” and this move is part of the ongoing commitment to taking care of its workforce.

According to reports citing from the industry sources, TSMC successfully commenced production of 3nm chips last year, and mass production is on track for the latter half of this year. Following this, advancements are being made in advanced processes, including 2nm and the development of processes such as A14 (1.4nm) and A10.

Specifically, after smooth research and development trials of the 2nm process this year, it will be integrated into the completed construction of Fab 20 in Baoshan, Hsinchu. The team at this facility is gearing up for risk production in 2024 and aims for mass production in 2025. A14 is expected to undergo trial production and mass production between 2027 and 2028.

TSMC has previously mentioned in its Earning Conference that the 2nm process technology will adopt a Nanosheet transistor structure, enhancing performance to meet the growing demand for energy-efficient computing.

Additionally, the 2nm family has developed backside power rail solution, particularly suitable for high-speed computing applications. The goal is to launch this solution for customer adoption in the latter half of 2025 and begin mass production in 2026.

Read more

(Photo credit: TSMC)

Please note that this article cites information from UDN

  • Page 1
  • 4 page(s)
  • 16 result(s)