As TSMC, Samsung, and Intel compete fiercely in the race for 2nm advanced processes, a new wave of the “battle for crucial equipment” is simultaneously unfolding.

According to South Korean reports, ASML, the leader in semiconductor advanced lithography equipment, plans to manufacture ten equipment capable of producing 2nm chips next year, while aiming to increase its annual production capacity to 20 devices in the coming years.

Intel has secured up to six of the 10, taking the lead, while Samsung is also actively pursuing the procurement of the equipment. TSMC faces significant pressure in this competitive landscape.

South Korean tech media SamMobile has unveiled that as major semiconductor manufacturers announce plans to start producing 2nm chips in 2025, ASML is set to unveil equipment capable of manufacturing chips using the 2nm process in the coming months.

The latest extreme ultraviolet (EUV) lithography equipment is expected to increase the numerical aperture (NA) from 0.33 to 0.55. This enhancement improves the light-collecting capability of the optical system, enabling semiconductor fabs to utilize advanced patterning techniques for the production of 2nm process chips.

ASML is the sole global manufacturer of advanced EUV equipment for processes at 7nm. These equipment are not only expensive, costing several million dollars each, but they also have limited production capacity.

It has led to high demand from major semiconductor manufacturers like Samsung, Intel, and TSMC. Currently, only five chipmakers globally, including TSMC, Samsung, SK Hynix, Intel, and Micron, require EUV equipment, with TSMC accounting for 70% of EUV purchases.

Consequently, Samsung is actively pursuing collaboration and has signed a historic agreement with ASML to jointly invest KRW 1 trillion (approximately USD 755 million) in establishing a research and development facility in South Korea.

This collaboration aims to contribute to the development of Samsung’s 2nm process. Samsung plans to commence the production of 2nm process chips by the end of 2025 after acquiring the 2nm manufacturing equipment.

Samsung Electronics Vice Chairman Kyung Kye-hyun, who heads the Device Solutions Division, emphasized that the new agreement with ASML will assist Samsung in acquiring the next-generation high NA EUV equipment.

Kyung said, “Samsung has secured a priority over the High-NA equipment technology. (From the trip), I believe we created an opportunity for us to optimize the usage of High-NA technology for our production of DRAM memory chips and logic chips in the long term.”

On the Intel front, as part of its IDM 2.0 strategy, it is executing a 5 nodes in four years process development plan. Intel emphasizes that its Intel 20A process is progressing towards volume production readiness as planned, while the Intel 18A process is scheduled to test production phase in the first quarter of next year.

Facing the strong competition from Samsung and Intel, TSMC is not sitting idle. According to reports citing from Financial Times, TSMC has showcased its 2nm prototype test results to major clients like Apple and NVIDIA.

TSMC previously mentioned in its earnings call that it expects the 2nm process to enter mass production as scheduled in 2025. The company’s 2nm backside power rail solution is scheduled for the latter half of 2025, with mass production slated for 2026.

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(Photo credit: ASML)

While TSMC makes promising strides in the 2nm process, slated for mass production in 2025, rivals Samsung and Intel are making headlines with aggressive moves to secure cost-effective deals. This surge in competition for the 2nm process is intensifying.

According to CNA, experts suggest that given the escalating rivalry in the AI chip market, it is paramount to have flawless execution in the process. Despite the recent efforts from Samsung and Intel, TSMC is anticipated to clinch the lion’s share of 2nm orders.

TSMC’s 2nm process is on track for mass production in 2025, with construction underway at its first 2nm fab in the Phase 2 Expansion Area of the Baoshan Site in the Hsinchu Science Park. The tool-in is scheduled for April next year. Simultaneously, TSMC’s Kaohsiung fab is earmarked as a crucial production base for 2nm in the future.

• [News] Samsung’s Discount Strategy Challenges TSMC as the Battle for 2nm Orders Heats Up

Samsung is gearing up for mass production of its 2nm process in 2025 as well. Reports from the Financial Times indicate that, in a bid to secure orders from industry giants like NVIDIA, Samsung is contemplating discounted offerings to challenge TSMC.

Intel, in its bid to reclaim its place in the semiconductor landscape, has set an big target of advancing 5 nodes in four years. Sanjay Natarajan, Senior Vice President at Intel, revealed in a recent interview with Nikkei Asia that the company aims to commence mass production of 2nm chips in 2024, with a commitment to providing reasonably priced products. Additionally, Intel’s 18A process is poised for trial production in the first quarter of 2024.

• [News] Intel, Samsung, TSMC Race in Cutting-Edge Processes

Analysts also share the insights of the competitive landscape among the three major semiconductor players, TSMC, Samsung, and Intel. Arisa Liu, the research fellow and director at the Taiwan Industry Economics Services of Taiwan Institute of Economic Research, notes that TSMC’s 2nm is expected to adopt a gate-all-around (GAA) architecture. In contrast, Samsung has taken an early lead by introducing GAA architecture in its 3nm, aiming to outpace TSMC in the 2nm process after 1 or 2 years of adjustments.

Liu highlights the challenges facing Samsung, noting that the 3nm GAA process has exhibited unstable yields. For example, Qualcomm, a major player in mobile chip, has reverted to TSMC for production. Even with Samsung’s plans for bidding at a reduced price, it is anticipated to face difficulties in denting TSMC’s order share in the short term.

Turning attention to Intel, Liu observes that Intel’s current process technology has advanced to Intel 4 and Intel 3, which do not align with the industry’s 4nm and 3nm processes. In reality, Intel’s progress is closer to 7nm or an enhanced version thereof. Notably, Intel’s 3nm products are still estimated to be outsourced to TSMC, signaling a substantial technology gap.

TSMC’s President, C.C. Wei, has previously outlined the company’s plan to initiate mass production of the 3nm N3P process in the latter half of 2024. Notably, its performance metrics, including power, performance, area (PPA), are expected to surpass Intel’s 18A.

Liu further pointed out the news of TSMC’s clients contemplating additional foundry partners has surfaced recently. This move is primarily seen as an attempt to exert pressure on TSMC and gain negotiating leverage. Given the fierce competition in the AI chip market, it is imperative to control precision in the manufacturing process. As such, TSMC’s 2nm is anticipated to secure a significant majority of orders.

(Image: TSMC)

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Despite the uncertainties in the semiconductor market, there is still an intense global competition in the development of advanced semiconductor manufacturing processes. TSMC as one of the key players in the foundry industry is actively advancing its next-generation 2nm process. According to market rumors, the schedule for the first tool-in at Hsinchu Baoshan Fab and Kaohsiung Fab has been established, along with a finalized production capacity plan.

CNA has reported that TSMC’s 2nm process will be deployed in the Phase 2 Expansion Area of the Baoshan Site at the Hsinchu Science Park. The first tool-in is scheduled for April 2024. Industry sources have revealed that the initial production capacity for this process will be around 30,000 wafers per month, with mass production planned for the following year.

In addition, TSMC’s fab in Kaohsiung has notified equipment suppliers that this facility is set to begin in the third quarter of 2025. According to MoneyDJ, the pilot run is planned for the end of the same year, with the aim of achieving mass production in 2026. The Kaohsiung fab will adopt the N2P process, which is an enhanced version of the 2nm process with the backside power rail technology. The initial monthly production capacity is also expected to be around 30,000 wafers.

According to previous disclosures made by TSMC during financial calls, the company has developed a backside power rail solution for the N2 process, which is particularly suitable for high-performance computing (HPC) applications. This innovative technology is expected to boost speed by 10% to 12% and increase logic density by 10% to 15%. TSMC plans to introduce the backside power rail solution to customers in the latter half of 2025, with mass production scheduled for 2026. This timetable aligns with recent rumor circulating in the supply chain.

In addition to the latest progress on the N2P process, TSMC made an official announcement at the IEEE International Electron Devices Meeting (IEDM) on December 12th. Specifically, the company revealed its plans to introduce a 1.4nm process as the successor to the 2nm process. As reported by Tom’s Hardware, this new process, named A14, continues the naming convention from the 2nm process (A20). Production using the A14 process is anticipated to take place between 2027 and 2028.

(Image: TSMC)

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Both TSMC and Samsung plan to start production on the 2nm process in 2025, triggering an early battle for related orders. According to sources reported by the Financial Times (FT), Qualcomm intends to shift production of its next-generation high-end mobile chips from TSMC to Samsung’s 2nm process. Samsung, offering substantial discounts, is aggressively pursuing orders from major players like NVIDIA, posing a challenge to TSMC’s dominance.

According to reports citing insider information, TSMC has showcased its 2nm prototype test results to major clients like Apple and NVIDIA. Additionally, sources indicate that Samsung is not only planning to introduce its 2nm prototype but is also offering discounted prices, attracting interest from prominent clients, including NVIDIA.

The report highlights that Qualcomm is planning to use Samsung’s “SF2” (2nm) process for the next generation of high-end smartphone chips. Samsung, as the first company to globally mass-produce 3nm (SF3) chips last year, is also the pioneer in adopting the new Gate-All-Around (GAA) transistor architecture.

Samsung indicated that, “We have fully deployed and can mass-produce SF2 in 2025. Since we are the first company to enter and transform the GAA architecture, we hope that the progress from SF3 to SF2 will be relatively smooth.”

However, insiders have disclosed that Samsung’s yield for the most basic 3nm chips is only 60%, significantly below customer expectations. Moreover, when producing chips with complexity equivalent to Apple’s A17 Pro or NVIDIA graphics processing units (GPUs), the yield may further decrease.

Global giants such as Qualcomm and NVIDIA follow a diversified wafer foundry strategy, but they still rely heavily on TSMC for now. Previously, NVIDIA’s Chief Financial Officer, Colette Kress, hinted during the UBS Global Technology Conference that NVIDIA may consider Intel for the production of its next-generation chips, potentially breaking away from the exclusive partnership with TSMC for AI chips.

Now, Qualcomm is also exploring collaboration with Samsung for the 2nm process, intensifying the pressure on TSMC to address potential order losses from two major clients in advanced semiconductor manufacturing.

TSMC, on the other hand, informed the Financial Times that the development progress of its 2nm process is proceeding smoothly, and it is scheduled for production in 2025. When launched, it will represent the industry’s most advanced semiconductor technology in terms of density and energy efficiency.

In a previous investor conference, TSMC stated that there is significant customer interest and engagement in 2nm for high-speed computing and smartphone applications. It is expected that 2nm, when introduced in 2025, will be the most advanced semiconductor technology in the industry, comparable or even superior to 3nm at the same stage.

TSMC plans to launch the 2nm backside power rail solution in the second half of 2025, with mass production scheduled for 2026.

Besides TSMC and Samsung actively advancing towards 2nm and more advanced processes, Intel has also joined the competition. The Financial Times characterizes this race for the 2nm process as “shaping the future of a USD 500 billion industry.”

Intel is progressing along its previously set 5 process nodes in a four-year trajectory. The Intel 4 process is ready for mass production, and the Intel 3 process is planned for launch later this year. Intel CEO, Pat Gelsinger, has previously showcased the Intel 20A wafer, which is expected to enter the pre-production phase in the first half of next year. The Intel 18A process is scheduled for mass production in the second half of 2024.

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(Photo credit: Samsung)

Equipment is playing an indispensable role during the wafer manufacturing process. In response to market needs, the global EUV lithography supplier, ASML, has recently taken significant steps.

ASML’s Bold Move: Annual Investment of EUR 100 Million in Berlin Plant

As reported by the German media “Handelsblatt,” the Netherlands-based company ASML plans to invest EUR 100 million (USD 109 million) in 2023, with a similar annual investment in the subsequent years. This investment aims to enhance the production and development capabilities of ASML’s manufacturing plant located in Berlin, Germany.

Reports indicate that ASML’s Berlin plant primarily produced core components of EUV equipment, including wafer clamps, wafer tables, reticle chucks and mirror blocks. ASML acquired this facility, known as “Berliner Glas,” in 2020.

Foundries Actively Pursue EUV equipment

The EUV equipment plays a crucial role in manufacturing, utilizing specific wavelength light for radiation to precisely imprint images on wafers. Currently, the EUV equipment market is highly concentrated, with only a few global companies mastering this technology. Among them, Dutch company ASML stands out as the world’s largest and most advanced EUV company. Additionally, companies like Nikon, Canon, and Shanghai Micro Electronics Equipment (SMEE) are strategically positioning themselves in the EUV sector.

EUV technology, used for exposing semiconductor process, is indispensable due to its high cost, complex processes, and limited supply. ASML is the sole global supplier of EUV. For advanced processes below 7nm, EUV serves as an essential device. Developed over more than 20 years, EUV technology has become the cornerstone of advanced processes, enabling the continuation of Moore’s Law for at least another decade.

As a crucial EUV equipment supplier, ASML is working on a new generation of NA-EUV equipment, where “NA” represents numerical aperture. A higher NA value means a higher achievable resolution, allowing for more transistors on the chip. It is expected that by the year-end, ASML will unveil the world’s first high-NA EUV and deliver it to Intel.

Currently, both TSMC and Samsung utilize EUV equipment for manufacturing, covering TSMC’s 7nm, 5nm, and 3nm processes and Samsung’s EUV Line (7nm, 5nm, and 4nm) located in Hwaseong, Korea, along with the 3nm GAA process.

TSMC’s 2nm process will continue to leverage EUV technology. In a previous announcement in September, TSMC disclosed the acquisition of Intel’s subsidiary IMS for up to US 432.8 million, focusing on the research and production of electron beam lithography machines. Industry experts believe that TSMC’s move ensures the technical development of critical equipment and meets the supply demand for the commercialization of 2nm.

Following 2nm chips. Samsung plans to achieve mass production of 2nm processes in the mobile field by 2025, expanding to HPC and automotive electronics in 2026 and 2027, respectively. According to the report in September, Samsung is gearing up to secure the yield of the next-generation EUV equipment, High-NA, with the prototype expected to launch later this year and official supply next year.

After announcing its return to the foundry business, Intel revealed in October that it has commenced mass production of Intel 4 process nodes using EUV technology. Currently, both Intel 7 and Intel 4 have achieved mass production, and Intel 3 is progressing according to plan, with the goal of completion by the end of 2023.

(Image: ASML)