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Driven by strong demand from cloud service providers, the demand for HBM and server modules has surged. However, constrained by long equipment lead times and capacity reallocation, supply growth continues to lag behind. As traditional memory is severely squeezed, the market supply deficit remains difficult to resolve, keeping prices elevated. Consequently, capital expenditures and procurement strategies require continued close attention.
The global humanoid robotics industry is advancing rapidly across three key hubs—China, North America, and the broader Asian supply chain—and is approaching a pivotal inflection point around 2026 as the industry transitions from technology validation to early commercialization.
The evolution of the ecosystem showcased at EAI SHOW, the growing pressure for commercial deployment highlighted at the Robotics Summit, and the advances in supply chain capabilities and computing platforms demonstrated at COMPUTEX all indicate that industry competition is shifting away from isolated technological breakthroughs toward system-level competition encompassing AI foundation models, critical components, and standard ecosystems.
Against this backdrop, humanoid robots are no longer viewed merely as an extension of industrial automation. Instead, they are increasingly emerging as the primary embodiment of next-gen Physical AI and a key catalyst for industry-wide transformation.
As memory giants realign capacity toward high-value advanced processes, mature node capacity faces severe compression. This structural shift has caused severe shortages in legacy chips, compelling industrial and automotive customers to adopt SLC as an alternative amid critical MLC deficits. Under the twin pressures of demand spillover and supply disruptions, SLC prices are expected to witness an explosive, structural rally in 2H, shifting the market dynamics from shipment-driven to price-driven.
As AI chips require increasingly stable power delivery, Si‑Cap (silicon capacitors) and their embedded/integrated packaging have become an important technological development direction, and key companies have successively announced silicon‑capacitor‑related plans, including SEMCO, which on April 14th 2026 announced plans to expand AI packaging production lines in Vietnam to produce Si‑Cap embedded substrates, and then in May revealed it had secured a long‑term contract of about US$1 billion from a major North American customer, and Analog Devices, which on May 19th 2026 announced a cash acquisition of the US Si‑Cap company Empower for US$1.5 billion in order to enter the AI supply chain.
This report mainly provides an in‑depth analysis of (1) the technical background of Si‑Cap, (2) the technological differences among major Si‑Cap vendors (Murata, SEMCO, AP Memory, Empower, TSMC, Samsung, Intel), and (3) the embedded/integrated Si‑Cap packaging requirements in the AI era, with the aim of explaining the technical principles of Si‑Cap, the reasons for growing demand, and the competitive landscape among existing vendors.
The surge in demand for AI chips and high-speed servers is driving the demand for high-end fiberglass cloth. However, constrained by technical barriers, equipment bottlenecks, and yield challenges, the release of new capacity remains slow, resulting in a persistent supply-demand imbalance for critical materials. Consequently, high-end products are expected to remain in short supply in the short term.
The AI industry entered a critical transition period in 2025, marked by the rapid expansion of LLMs and the large-scale commercialization of AI applications. For China’s semiconductor industry, this represents not only an opportunity to narrow the technological gap but also a battle for computing sovereignty under intense geopolitical pressure. The country’s AI chip industry is facing unprecedented pressure from two sides as the U.S. Bureau of Industry and Security (BIS) continues to tighten and refine its export controls on China,
On the one hand, China’s Eastern Data Western Compute (EDWC) initiative and the massive investments in AI infrastructure made by leading internet companies are driving enormous demand for computing power. On the other hand, access to critical technologies, including advanced logic manufacturing, high-bandwidth memory (HBM), and CoWoS advanced packaging, remains severely constrained, thereby creating a growing imbalance between demand and supply.
Global semiconductor supply chains are shifting from efficiency to resilience amid escalating export controls, driving manufacturing diversification. Governments race to subsidize domestic ecosystems, while China pursues dual-track strategies; material self-sufficiency remains a lasting challenge.
Driven by AI infrastructure, major DRAM makers shift capacity to advanced nodes, tightening mature processes. To secure supply and control costs, brands downgrade to older generation consumer DRAM, shifting shortages from DDR4 down to DDR2 and boosting prices. Taiwanese suppliers pivot strategies accordingly, reflecting a persistent global structural DRAM shortage.
In January 2026, NVIDIA introduced the CMX Context Memory Storage Platform, managed by the BlueField‑4 DPU, to extend the memory hierarchy between local SSD and shared storage and address the massive KV cache storage demands of the AI inference era. In addition, NVIDIA and Arm have successively launched CPU racks to meet the CPU requirements of agentic AI, creating an incremental market for CPU RAM.
This report provides an in‑depth analysis of: (1) memory demand in AI inference; (2) SSD POD demand driven by KV cache offloading; and (3) CPU RAM demand driven by agentic AI. The goal is to explain why memory capacity needs are expanding in the AI inference era, review current solutions, and outline the future structure of emerging memory demand.
The need for power integrity in AI servers is extending from the board level directly into the package. This shift is driving a transition in capacitor technology, moving beyond a sole reliance on traditional multi-layer ceramic capacitors (MLCCs) toward a layered, complementary approach utilizing both silicon capacitors and MLCCs. While MLCCs remain the primary components for system-level decoupling, filtering, and voltage regulation across PCBs, VRMs, power shelves, and power modules, silicon capacitors offer distinct localized advantages. Their thin profile, low equivalent series inductance (ESL), excellent high-frequency characteristics, and stable capacitance under DC bias and temperature fluctuations make them ideal for near-die decoupling around GPUs, ASICs, HBMs, and within advanced packages. As AI accelerators increasingly adopt chiplets, HBM stacking, and high-power packaging, silicon capacitors are poised to become vital complementary components for package-level power integrity in AI and HPC applications.
