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NVIDIA once again showcased its Rubin-series chips and rack systems—scheduled for launch by the end of 2026—at GTC 2026 on March 16th. Compared to the previous generation, the Rubin series boasts significantly larger substrate sizes, higher layer counts, and increased rack board complexity.
Furthermore, the shift toward cableless design architectures is driving demand for components such as midplanes and orthogonal backplanes, while the introduction of the inference-focused Rubin LPX rack is further boosting demand for high-end glass fiber cloth.
However, the supply side is facing severe constraints. Nittobo, which controls approximately 90% of the global T-glass market and 60–70% of the NER-glass market, is not expected to bring new capacity online until mid-2027 at the earliest. This implies that supply gaps for critical materials will persist over the next year, with direct implications for lead times and cost trends across the AI server supply chain. This issue warrants close attention from all industry stakeholders.
This report provides an in-depth analysis of:
(1) The technology background and development of glass fiber cloth;
(2) AI-driven demand trends for glass fiber cloth;
(3) Nittobo’s capacity bottlenecks and their impact on pricing.
The objective is to offer a comprehensive view of demand momentum, pricing trends, and competitive dynamics in the high-end fiberglass cloth market.
AI demands and chip upgrades drive smartphone storage growth despite high costs. Brands raise base specs, making large capacities the new standard.
With Google, Meta, and MediaTek all considering adopting Intel’s EMIB packaging technology, Intel’s technological progress in advanced packaging and glass substrates has once again attracted significant attention in the industry. In particular, Intel showcased the first sample at NEPCON Japan on January 22nd 2026 that combines Intel’s EMIB packaging with a glass substrate, capable of supporting a chip twice the reticle size, with bump pitch shrunk to 45µm, and claimed to have achieved No SeWaRe (no micro‑cracks) during testing, implying that glass substrates are one step closer to mass production. On the other hand, besides Intel, TSMC, Samsung (SEMCO), Rapidus, and SK Absolics are also expected to achieve mass production of glass substrates successively between 2027 and 2028.
This report mainly provides in‑depth analysis of: (1) trends in large‑size chip packaging; (2) the advantages of glass substrates; (3) the glass substrate technology roadmaps of major foundries/OSATs; (4) challenges in mass production of glass substrates; (5) glass substrate solutions and corresponding suppliers; and (6) an overview of the glass substrate supply chain and opportunities for Taiwanese manufacturers. This report analyzes current demand drivers for glass substrates, technological bottlenecks, supplier performance, and potential supply‑chain opportunities for Taiwanese companies.
DRAM industry will focus on HBM capacity expansion, with Chinese suppliers limited by equipment restrictions; major players like Samsung, SK hynix, and Micron emphasize tech migration and AI applications, intensifying HBM competition where HBM4 validation will shape market shares, while conventional DRAM relies on tech upgrades for growth.
As Co-Packaged Optics (CPO) moves from the lab toward commercialization, inspection has become the key to achieving mass producibility and long-term system stability. However, CPO inspection still faces challenges such as tighter alignment‑accuracy requirements, insufficient automation, and the lack of established PIC test standards. To address these issues, traditional EIC test‑equipment vendors such as Advantest and Teradyne have in recent years begun partnering with PIC probing specialists like FormFactor and ficonTEC, while measurement‑instrument vendors such as Keysight and Enlitech have also introduced solutions that can be integrated into CPO inspection systems.
This report therefore provides an in‑depth analysis of: (1) CPO technical bottlenecks and test challenges, (2) CPO test levels, (3) existing CPO inspection equipment and suppliers, as well as (4) supply‑chain opportunities for CPO test equipment. The aim is to help vendors understand CPO test technology developments and the competitive landscape of the supply chain.
Driven by robust demand for AI servers and high-performance computing, the memory market has entered a super-cycle of price hikes starting from 2H25. Escalating memory costs are forcing brands to raise end-device prices and scale back low-end models to cope with cost pressures. Against this backdrop, the year-on-year decline in global smartphone production for 2026 could widen to approximately 15%, or potentially even higher, under a pessimistic scenario. However, given the absence of signals indicating a halt in price increases and persistent supply tightness, most brands are choosing to maintain their established procurement volumes with suppliers to secure resource allocations. It is noteworthy that this wave of memory price increases is driving up the retail prices of various electronic devices, further evolving into a broader risk of consumer electronics inflation.
AI infrastructure upgrades are driving structural memory demand, making DRAM and NAND Flash critical resources. Heavy CSP investment is pushing prices and revenue to record highs. With persistent shortages giving suppliers pricing power, the market is poised for sustained long-term growth.
As global majors exit the MLC market for advanced processes, a supply cliff has driven prices up. However, persistent demand from high-reliability sectors has transformed MLC into a high-margin niche. Macronix is strategically cutting NOR Flash output to boost MLC supply, filling the gap and solidifying its key supplier role.
CSP AI investment fuels robust server growth.
The US may permit NVIDIA H200 exports to China to hinder full localization. As a strategic compromise, the H200 aims to fill the void left by H20. While facing competition from domestic policies, it remains attractive to Chinese tech giants, prompting supply chain adjustments.
