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The rapid growth of demand for AI semiconductors is driving the evolution of advanced packaging technologies, with Fan-Out Panel-Level Packaging (FOPLP) emerging as a new battleground across the industry. TrendForce reports that TSMC is currently focusing on its Chip-on-Panel-on-Substrate (CoPoS) packaging architecture and has standardized on a 310 × 310 mm panel format.
According to TrendForce’s latest MLCC industry research, the ongoing AI arms race among global CSPs is accelerating the adoption of in-house ASIC accelerators, which increasingly rely on small-form-factor, high-capacitance, high-temperature-resistant MLCCs. As such, demand is rapidly concentrating on a limited number of premium specifications. However, with supplier capacity expansion lagging behind demand growth, the risk of structural shortages in the second half of 2026 is becoming increasingly difficult to ignore.
Major memory suppliers continue to prioritize capacity allocation toward higher-value products such as HBM and advanced-layer 3D NAND, according to TrendForce’s latest research on the memory industry. This has squeezed the mature-node capacity for NOR Flash and SLC NAND.
TrendForce’s recent research on silicon photonics (SiPh) shows that the rapid growth of AI training and inference workloads is pushing AI data centers toward increased power use, higher rack densities, and larger clusters. As data transfer becomes a major energy drain, CSPs are treating interconnect technologies as equally important as compute hardware. The architecture of interconnects now plays a key strategic role in determining AI factory growth, energy efficiency, and supply chain management.
TrendForce's latest investigation into the foundry industry reveals that strong shipments of AI HPC chips and related components continued throughout 1Q26. Meanwhile, TV and PC/notebook supply chains accelerated production schedules and increased inventory levels for peripheral ICs, prompting foundries to receive pull-in orders and additional customer bookings.
