News
To turn adversity around, Intel launched its latest AI accelerator, Gaudi 3, in late September. However, a report by the Economic Daily News indicates that the struggling giant has significantly slashed the chip’s shipment targets by over 30% for next year, which may severely impact orders for its Taiwanese supply chain.
According to the report, the move could be attributed to the Intel’s internal strategy adjustments and the fluctuation of customer demand, which prompts it to cut orders on Taiwanese companies such as TSMC, ASE Technology, and ASIC firm Alchip.
According to industrial sources cited by the report, Intel originally projected to ship 300K to 350K units of Gaudi 3 in 2025. However, the target has now been revised to 200K to 250K units, marking a reduction of more than 30%.
According to the report, after acquiring Israel-based AI chip company Habana Labs in 2019, Intel seems to be relatively conservative about their co-development of the next-gen AI accelerators. Intel’s cautious attitude is evident from its recent moves, such as expediting the conclusion of previous projects like Gaudi 2, as well as lowering the shipment target for Gaudi 3 next year.
Intel declined to comment on the matter, the report notes.
According to industrial sources cited by the report, the adjustment will pose limited impact to TSMC, which manufactures Intel’s Gaudi 3 with its 5nm node. While the demand for the foundry leader’s advanced nodes remains robust, other customers are expected to quickly fill the gap left by Intel.
In terms of IC packaging and testing services provider ASE and its subsidiary SPIL, as they also have a diversified client portfolio, with major tech companies placing orders, the capacity can be swiftly reallocated to minimize the impact, the report suggests.
Nevertheless, for those with smaller scales and a higher client concentration, the impact may be more significant. Taiwanese ASIC firm Alchip, which provides ASIC design services for Intel’s Gaudi 2 and Gaudi 3, therefore, may be more vulnerable to Intel’s potential shipment reduction, according to the report.
Unimicron, which serves as the primary supplier of substrates for Intel’s chips, may also be impacted by the fluctuation of Intel’s orders, the report notes. However, when asked about the potential impact, the company reaffirms its optimistic outlook regarding the second half of 2024, as it expects the demand for AI accelerators and optical modules to be stronger than the first half.
Currently, NVIDIA still holds the throne in the global AI chip market, with rivals such as AMD and Intel eagerly trying to catch up.
Intel’s latest effort, Gaudi 3, boasts 64 Tensor processor cores (TPCs) and eight matrix multiplication engines (MMEs) to accelerate deep neural network computations, and is specifically optimized for large-scale generative AI, according to its press release. It even claims to offer double the performance at the same cost compared to NVIDIA’s H100, the report says.
Read more
(Photo credit: Intel)
News
The surging global demand for AI chips is straining advanced packaging capacity, driving a sharp focus on fan-out panel-level packaging (FOPLP) within Taiwan’s semiconductor industry. According to a report by Commercial Times, major packaging and testing firms such as ASE and Powertech, alongside equipment manufacturers like Gudeng, GPTC, E&R Engineering, Mirle, and analysis firm MAtek, are investing heavily in FOPLP technology.
The rapid development and expanding applications of AI chips have intensified the need for higher chip performance, smaller sizes, better heat dissipation, and lower costs. As emerging applications such as 5G, AIoT, and automotive chips continue to grow, the demand for high-performance, high-power semiconductors has surged. FOPLP technology, which enhances performance while significantly cutting costs and addressing thermal and signal integration issues, is emerging as a key trend in the market.
ASE has been working on panel-level packaging for several years. The company expects its panel-level packaging equipment to be in place by the second quarter of 2025, maintaining a technological edge. On October 2, ASE announced a nearly NT$8 billion purchase of equipment by its subsidiary, SPIL, from companies including Advantest.
Powertech has already moved into wafer-level fan-out packaging and is now shifting toward panel-level fan-out packaging. The company claims that the new technology can increase chip area output by two to three times. It has dedicated its Hsinchu plant to panel-level fan-out packaging and TSV CIS, positioning itself for future growth opportunities.
Equipment manufacturers are also seeking to capitalize on this trend. GPTC, a supplier to major foundries for InFO packaging, is expected to benefit from future FOPLP opportunities due to the similar nature of its equipment. Gudeng Precision is developing panel-level packaging transport boxes, with mass production expected in 2025.
FOPLP combined with TGV drilling is seen as the key to this technology. Analysts cited by Commercial Times highlight that FOPLP+TGV enables higher area utilization and unit capacity, which effectively reduces heterogeneous packaging costs.
E&R Engineering is focusing on drilling, testing, and cutting equipment for glass substrates, primarily supplying panel manufacturers in Taiwan and outsourced assembly and testing providers in Southeast Asia. Mirle has targeted glass substrate transport equipment, while MAtek is leading the market in glass substrate inspection technology.
(Photo credit: ASE)
News
According to a report by the Commercial Times, while TSMC, the global foundry leader, has established a plant in Kikuyo, Kumamoto City, Kyushu. ASE Technology Holdings (ASE), a giant in packaging industry, is setting up a plant in Kitakyushu as well. With these developments, Japan’s semiconductor production could potentially integrate both front-end and back-end processes, forming a cluster within Kyushu.
This development could lead to a revival of Kyushu’s semiconductor industry, once known as the “Silicon Island” in Japan, attracting more semiconductor supply chain companies to the region.
The report further notes that related equipment and inspection company, including MA-tek, semiconductor transmission and storage solutions provider Gudeng Precision, and semiconductor material distributor Topco Technologies Corp. (Topco) have all established bases in Kumamoto.
MA-tek, a leader in semiconductor inspection and analysis services, established its first Japanese laboratory in 2019 and a second one in Kumamoto in 2023. Since their establishment, these laboratories have consistently achieved growth rates higher than the company average.
With the rise of AI applications, many Japanese clients have AI chip development projects, leading to increased demand for MA-tek’s materials analysis (MA) and advanced process inspection services.
To capitalize on advanced process and packaging opportunities brought by AI, the company MAT has decided to increase its capital expenditure this year to between NTD 1.2 billion and NTD 1.4 billion.
These funds will be used to expand and upgrade the testing equipment and laboratory facilities in Nagoya and Kumamoto, and to establish a third laboratory in Hokkaido, which is expected to start contributing to revenue in Q1 2025.
On the other hand, Gudeng Precision is also planning to build a new plant in Kurume in Q2 this year, located between Fukuoka and Kumamoto, with a planned area of approximately 3,000 ping (about 10,000 square meters).
Gudeng Precision’s investment in Kurume, Japan, including equipment procurement, is estimated at about NTD 400 million to NTD 450 million. Construction is expected to begin by the end of this year, with production slated to start by the end of 2025.
Read more
(Photo credit: JASM)
News
South Korean media reports that the main suppliers of artificial intelligence (AI) chip packaging are concentrated in TSMC and ASE Technology Holding Co., which have been actively expanding production to meet the growing market demand. Despite efforts to develop technology and invest, South Korean companies like Samsung Electronics have not been able to narrow the gap with TSMC and ASE.
According to the Chosun Ilbo, industry insiders indicated that TSMC is expanding its advanced packaging (CoWoS) capacity by selecting a site in the southern region, while ASE also announced the construction of a second packaging and testing factory in California, USA, and plans to build another in Mexico. The rapid growth of the AI chip market highlights the increasing importance of semiconductor packaging and testing. As the benefits of semiconductor process miniaturization diminish and production costs rise, advanced packaging that can connect multiple components has become an ideal alternative solution. Some organizations predict that the semiconductor packaging market is expected to grow by more than 10% annually and expand to USD 90 billion by 2030.
Taiwanese companies like TSMC and ASE benefit a lot, almost monopolizing the contract manufacturing of AI chips for companies like NVIDIA and AMD. In terms of chip manufacturing, TSMC aims to double its CoWoS capacity from the previous year to meet increasing orders. TSMC recently announced plans to build two new advanced packaging factories in the southwest. The construction of the first factory was paused due to the discovery of ancient artifacts, but TSMC quickly sought a new site and announced an expansion of CoWoS facilities investment by 2025.
ASE, serving customers including Qualcomm, Intel and AMD, is also striving to increase equipment investment to meet rising orders. ASE, with the highest market share in the semiconductor packaging and testing field, is increasing its capacity and considering building a factory in Japan to match the growing demand. ASE’s CEO Wu Tianyu stated that they are looking for a location in Japan with a solid semiconductor ecosystem for the new factory.
Samsung has also announced packaging investment plans. The company intends to raise the investment in the new plant in Taylor, Texas, USA from USD 17 billion to more than USD 40 billion for the construction of an advanced packaging research and development center and facilities, in which it will allocate over KRW 2 trillion annually to expand advanced packaging production lines.
South Korean semiconductor back-end packaging and testing (OSAT) companies such as Hana Micron and Nepes are also striving for AI chip packaging orders based on technical development. Hana Micron, the leading OSAT company in South Korea, has announced its commitment to developing 2.5D AI semiconductor packaging. Nepes is developing Package on Package (PoP) technology, which integrates different semiconductors into one chip, with a target for commercial mass production in the second half of 2025.
Despite the efforts of South Korean companies, it is difficult to narrow the gap with Taiwanese companies in the short term. Taiwanese companies have actively developed advanced semiconductor packaging and commercializing CoWoS at a earlier time, while South Korean packaging companies lag in accumulated technologies. South Korean industry insiders point out that TSMC and ASE have been collaborating for over 30 years. Therefore, as TSMC secured a large number of AI chip orders, it would prove a boon to Taiwan’s packaging ecosystem. In contrast, South Korea’s packaging industry, which has long focused on the memory production market, still has a long way to go to expand its market and even compete with Taiwanese companies.
News
According to a report from CNA, Taiwanese semiconductor testing and packaging giant ASE announced on June 21st that it will collaborate with Hung Ching Development & Construction Corporation to jointly build the K28 plant in Kaohsiung. Scheduled for completion in Q4 2026, the facility will reportedly focus on advanced packaging and final testing in order to meet the high-performance computing and cooling demands of AI chips.
ASE’s CFO Joseph Tung stated that ASE Semiconductor is planning for operational growth at its Kaohsiung facilities. To meet the demand for advanced packaging processes, high-performance computing for AI chips and cooling, the company is developing land in Dashe, Kaohsiung in two phases. The first phase, K27 plant, was completed and moved-in in 2023, while the K28 plant, the second phase, aims to be completed by Q4 2026.
As reported by CNA citing sources, ASE Kaohsiung Plant contributes approximately 20% to ASE Technology Holding Co., Ltd.’s total revenue. The plant specializes in providing services such as packaging, wafer bumping, probe testing, materials, and final testing. It has also developed several smart factories focusing on advanced processes, including Fan-out packaging, System-in-Package (SiP), wafer bumping, and Flip Chip packaging.
These technologies are primarily used in automotive, medical, IoT, high-speed computing, artificial intelligence, and application processor fields.
Read more