Subject


IC Manufacturing, Package&Test


2026-01-01

[News] SMIC Announced Two Massive Capital Investment

IC Manufacturing, Package&Test

SMIC to Buy the Remaining 49% Shares of SMIC North and to Bring in New Investors On December 29, Semiconductor Manufacturing International Corporation (SMIC) released an announcement widely seen as a textbook case of balance-sheet management. By buying profits and introducing state capital in loc...

2025-12-29

[News] TSMC Reportedly to Raise Sub-3nm Prices 3-10% in 2026, Plans Hikes Through 2029

IC Manufacturing, Package&Test

While mature-node foundries, led by SMIC, have sparked a new wave of price hikes, TSMC is reportedly joining the trend. According to the Economic Daily News, the company has notified clients that it will raise prices for advanced nodes consecutively from 2026 through 2029, with the new 2026 rates ta...

2025-12-29

[News] 7.0 Quake Hits: TSMC Nears Full Production, Sector Losses Reportedly Tens of Billions NTD

IC Manufacturing, Package&Test

Just before year-end, a magnitude-7.0 earthquake struck Taiwan at 11:05 p.m. on the 27th, with the epicenter off Yilan and seismic intensity reaching level four in Hsinchu City and County — heightening concerns over potential disruption to foundries and memory makers. Commercial Times, citing T...

2025-12-26

[News] TSMC Dismisses Nanjing Risks as VEU Expires, Flags Global Advanced Capacity for Chinese Clients

IC Manufacturing, Package&Test

With TSMC’s Nanjing fab VEU (Validated End-User) status set to expire on December 31, 2025, the company has clarified its position. According to MyDrivers and ijiwei, TSMC China President Roger Luo said supply chains remain secure and dismissed lingering concerns that the country’s clients are l...

2025-12-25

[News] Japan Develops 10nm Nanoimprint Technology, with Potential to Tackle EUV Bottleneck

IC Manufacturing, Package&Test

Japan’s Dai Nippon Printing (DNP) recently announced the successful development of nanoimprint lithography (NIL) technology with circuit line width as fine as 10 nanometers. The technology is designed for patterning 1.4nm-class logic semiconductor circuits. Customer evaluation has already begun, w...

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