advanced process


[News] TSMC’s 2023 Wafer Average Selling Price Rises by 22%, Driven by N3 Process Success

Fueled by the advancement in TSMC’s N3 process technology, the average selling price (ASP) of TSMC’s 12-inch wafers increased to USD 6,611 in the fourth quarter of 2023, registering a year-on-year growth of 22% despite the subdued semiconductor market.

According to a report by TechNews, Bernstein Research has indicated that the current growth in most semiconductor industries stems from the increase in pricing rather than a rise in chip shipment volumes.

As per a report by Tom’s Hardware, the wafer shipment volume of TSMC serves as evidence in many aspects. In the fourth quarter of 2023, TSMC’s shipment of 12-inch wafers was 2.957 million units, lower than the 3.702 million units in the fourth quarter of 2022. This marks the first time since 2020 that TSMC’s 12-inch wafer shipments have fallen below 3 million units. However, the revenue showed only a marginal decline.

Despite a significant 20.1% decrease in the fourth-quarter shipment volume of TSMC’s 12-inch wafers compared to the previous year, the revenue for the quarter reached USD 19.62 billion, only a 1.5% decrease from USD 19.93 billion in the fourth quarter of 2022.

Meanwhile, the average price of TSMC’s processed 12-inch wafers in the fourth quarter of 2023 reached USD 6,611 per unit, surpassing the USD 5,384 per unit in the fourth quarter of 2022. This is attributed to the increased shipment volume of wafers at the N3 process to customers, including Apple.

The report further cites sources indicating that TSMC may charge up to USD 20,000 per wafer manufactured using its N3 process. Although this figure may not be entirely accurate as TSMC’s pricing depends on various factors, the key point is that TSMC’s fees for the N3 process are higher compared to the N4/N5 or N6/N7 process.

Therefore, it can be argued that TSMC’s increase in manufacturing prices for process nodes has played a significant role in driving almost all growth in the semiconductor industry in recent years.

In essence, as time progresses, new process nodes will become increasingly expensive. The total chip shipments from 2019 to 2023 have actually decreased, but the ASP has significantly increased.

In particular, TSMC’s wafer revenue for the fourth quarter of 2023 was notably influenced by its N3 process, contributing 15%, while the N5 and N7 process contributed 39% and 17%, respectively.

This breakdown signifies that the N3 process node generated USD 2.943 billion in revenue for TSMC, the N5 process contributed USD 6.867 billion, and the N7 process brought in USD 3.3354 billion.

Overall, TSMC’s advanced process (N7, N5, N3) accounted for 67% of its total wafer revenue. Among these, revenues from System-on-Chip (SoC) used in smartphones and high-performance computing applications each constituted 43%, automotive chip revenue made up 5%, and IoT chip revenue contributed 5%.

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(Photo credit: TSMC)

Please note that this article cites information from TechNews and Tom’s Hardware.


[News] Rumors Suggest TSMC’s 2nm Node First Tool-In with Monthly Production Capacity Unveiled

Despite the uncertainties in the semiconductor market, there is still an intense global competition in the development of advanced semiconductor manufacturing processes. TSMC as one of the key players in the foundry industry is actively advancing its next-generation 2nm process. According to market rumors, the schedule for the first tool-in at Hsinchu Baoshan Fab and Kaohsiung Fab has been established, along with a finalized production capacity plan.

CNA has reported that TSMC’s 2nm process will be deployed in the Phase 2 Expansion Area of the Baoshan Site at the Hsinchu Science Park. The first tool-in is scheduled for April 2024. Industry sources have revealed that the initial production capacity for this process will be around 30,000 wafers per month, with mass production planned for the following year.

In addition, TSMC’s fab in Kaohsiung has notified equipment suppliers that this facility is set to begin in the third quarter of 2025. According to MoneyDJ, the pilot run is planned for the end of the same year, with the aim of achieving mass production in 2026. The Kaohsiung fab will adopt the N2P process, which is an enhanced version of the 2nm process with the backside power rail technology. The initial monthly production capacity is also expected to be around 30,000 wafers.

According to previous disclosures made by TSMC during financial calls, the company has developed a backside power rail solution for the N2 process, which is particularly suitable for high-performance computing (HPC) applications. This innovative technology is expected to boost speed by 10% to 12% and increase logic density by 10% to 15%. TSMC plans to introduce the backside power rail solution to customers in the latter half of 2025, with mass production scheduled for 2026. This timetable aligns with recent rumor circulating in the supply chain.

In addition to the latest progress on the N2P process, TSMC made an official announcement at the IEEE International Electron Devices Meeting (IEDM) on December 12th. Specifically, the company revealed its plans to introduce a 1.4nm process as the successor to the 2nm process. As reported by Tom’s Hardware, this new process, named A14, continues the naming convention from the 2nm process (A20). Production using the A14 process is anticipated to take place between 2027 and 2028.

Please note that this article cites information from CNAMoneyDJ and Tom’s Hardware

(Image: TSMC)

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[News] TSMC May Reduce Next Year’s Capital Expenditure, Affecting Orders for Equipment & Testing-Related Companies

Market speculations rumored that TSMC might cut its capital expenditure for next year to USD 28-30 billion. This potential reduction, ranging from 6.3% to 12.5% compared to this year, is attributed to the shared use of certain process equipment and the utilization of deferred budgets from the current year. If realized, this would mark the lowest capital expenditure point in nearly four years. Additionally, it could impact the order volumes for equipment & testing-related companies, influencing the overall order dynamics in the supply chain for the upcoming year, reported by UDN News.

Responding to the speculations about a decrease in next year’s capital expenditure, TSMC stated on the December 4th that regarding next year’s capital expenditure will be officially disclosed during the January 2024 conference. Despite the potential moderation in capital expenditure, industry observers anticipate continued growth in R&D investment, particularly in advanced process technology.

Industry sources suggest that TSMC’s R&D investment in advanced process technology will persist in its growth trajectory for the next year. Notably, approximately 80% of the equipment for the 3nm advanced process can be shared with the 5nm and 7nm processes. The focus of next year’s capital expenditure is expected to be on investments in the 3nm and below advanced processes and mask technology.

Meanwhile, mature processes will bring a rise in the share of specialty processes and equipment modifications for advanced packaging.

During 2023Q3 earnings call in October, TSMC set a cautious tone, citing uncertainties in the short-term market. The company maintained this year’s capital expenditure at nearly USD 32 billion, adopting a prudent approach to investment.

On the other hand, ASML, the global leader in semiconductor lithography technology, recently released its financial report. The forecast indicates that 2024 will be a transitional year, with expected revenue similar to that of 2023. This cautious outlook aligns with the semiconductor industry’s current phase of experiencing the bottom of the cycle.

Please note that this article cites information from the UDN News

(Image: TSMC)


[News] TSMC Chairman Notes Global Fragmentation with the Rise of Nvidia and Fabless companies

TSMC’s Chairman, Mark Liu, recently addressed the challenges posed by global fragmentation and emerging national security concerns, which may potentially lead to a slowdown in global innovation. Despite these concerns, Liu emphasized Taiwan’s ability to respond calmly. TSMC remains committed to advancing its manufacturing processes and collaborates closely with clients to establish an open innovation platform.

On November 22th, Liu spoke at a lecture organized by Chinese National Association of Industry and Commerce, Taiwan (CNAIC), focusing on “TSMC in the AI Era,” as reported by the Central News Agency (CNA). During the lecture, Liu highlighted that Taiwan’s semiconductor industry, serving as a cornerstone, plays a vital role in driving advancements in AI applications.

However, he also acknowledged that the ongoing US-China chip war has brought global fragmentation and raised national security concerns, potentially slow down the pace of global innovation. Despite these challenges, Liu expressed confidence in Taiwan’s ability to handle them effectively.

In terms of  latest updates on TSMC’s global fabs, Liu mentioned positive communication with local unions in the US, showcasing TSMC’s ability to adapt and learn from new experiences. He also commended the high-quality and dedicated personality of Japanese engineers during his visit to Japan.

TSMC’s fab in Arizona, employing nearly 1,100 local staff, continues to recruit talents with plans for mass production to commence in 2025. The Kumamoto fab in Japan is expected to initiate production of 12nm, 16nm, 22nm, and 28nm processes by the end of the next year.

Regarding TSMC’s upcoming fab in Germany, the company aims to establish a specialized wafer fab focusing on automotive and industrial applications. This fab will produce 12nm, 16nm, 22nm, and 28nm processes, with construction set to begin in the second half of the next year and production slated for the end of 2027.

[News] TSMC’s Fab in Germany Progress Reports Potential Setback in Manager Selection?

Rise of Nvidia and other fabless companies, anticipating 10% growth in the next five years

Looking forward to the future tech landscape, Liu also anticipated Nvidia’s emergence as the world’s largest semiconductor company in 2023. From recent financial reports, Nvidia’s Q3 revenue reached USD 18.12 billion, surpassing TSMC’s USD 17.27 billion for the same quarter, as well as Intel’s USD 14.16 billion and Samsung Semiconductor’s USD 12.52 billion.

The rapid progress of Fabless companies also caught Liu’s eye. Fabless companies are expected to grow by around 10%, and IDMs by only 4% in the next five years. Additionally, he emphasized that semiconductor technology advances threefold every two years, projecting a 242-fold improvement over a decade.

What is “Fabless”?

Companies exclusively engaged in semiconductor design are referred to as “Fabless.” This term originates from the fact that these companies do not have their own fabrication. They are also known as “fabless semiconductor companies” due to their specialty of not owning production fab. Further categorization within fabless companies includes IC design and IP design.

Industry note that Nvidia’s growth as a fabless company is attributed to the surging demand for AI, including an optimized product portfolio. While Nvidia’s financial report mentioned geopolitical limitations and potential delays in H20’s launch, the company remains a global leader in AI computing. As for TSMC, it stands out as the most advanced pure-play foundry with its 3nm process, gradually increasing production in the second half of the year to alleviate inventory adjustment pressures within the rest of the 7nm family.
(Image: TSMC)


[News] Intense Competition in Advancing Processes at the 2nm by Samsung, Intel, and TSMC

According to TechNews’ report, Gitae Jeong, Vice President of Samsung Electronics, recently revealed in an interview that the company is set to introduce the SF1.4 (1.4nm) process, expected to enter mass production in 2027.

This announcement intensifies the competition in advanced semiconductor manufacturing, particularly in the development of 2.5D/3D integrated heterogeneous structure packaging among the three major semiconductor foundry giants.

  • TSMC: N3P Process Superior to Intel 18A, N2 to Lead Industry’s Advanced Processes

Previously, the semiconductor industry reported challenges with both TSMC and Samsung achieving yields above 60% for their 3nm processes due to undisclosed issues. TSMC’s yield was reported to be only 55%, below the normal yield rate.

However, TSMC’s President, C.C. Wei, expressed optimism, stating that current N3 demand is better than three months ago, contributing to a healthy growth outlook for TSMC in 2024.

Wei also anticipates that TSMC’s 3nm process will contribute a mid-single-digit percentage (4%-6%) to the company’s annual wafer revenue in 2023.

Regarding competition with rival Intel’s 18A process, Wei believes that TSMC’s N3P process offers better performance, power, and area (PPA), alongside improved cost efficiency and technical maturity. Furthermore, TSMC’s upcoming N2 process is expected to be the industry’s most advanced when introduced.

  • Intel: Striving for the Fourth Customer for 18A Process Outsourcing Orders

Intel’s CEO, Pat Gelsinger, has revealed that the 18A process has secured orders from three customers and aims to acquire a fourth customer by the end of the year. The advanced 18A process is scheduled to begin production at the end of 2024, with one customer already having made an advance payment. External expectations suggest that the customer could possibly be NVIDIA or Qualcomm.

Intel has stated that Intel 4 and Intel 3 processes are similar, as are Intel 20A and Intel 18A processes. Consequently, Intel’s primary focus will be on offering Intel 3 and Intel 18A to semiconductor foundry customers. Meanwhile, Intel 4 and Intel 20A processes are more likely to be used internally. However, Intel is open to accommodating customer requests if they express interest in adopting these later processes.

  • Samsung: Commencing Mass Production of SF2 in 2025, Prioritizing Internal Use

Due to challenges with the three-nanometer (3nm) manufacturing process, there have been reports that Samsung plans to shift directly to the more advanced two-nanometer (2nm) process.

According to Samsung’s Foundry Forum (SFF) plan, they will begin mass production of the 2nm process (SF2) in 2025 for mobile applications, expand to high-performance computing (HPC) applications in 2026, and further extend to the automotive sector and the expected 1.4nm process by 2027.

Similar to Intel, Samsung intends to prioritize the production of its own products using the 2nm process. The 2nm process products will initially be utilized for Samsung’s in-house products rather than external customer products.

  • Summary

While TSMC’s N3 series currently enjoys broad support, including N3E, N3X, and N3P process series, the move to 2nm introduces new variables as it adopts a completely new GAAFET architecture. Regardless, whether it’s TSMC’s N2, Intel’s 18A, or Samsung’s SF2, each of them possesses its competitive strengths. The industry is also eagerly anticipating the future developments in advanced semiconductor processes.

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