[News] The Quiet Beginning of the 3D DRAM Market Share Battle

From the current landscape of publicly available DRAM technologies, the industry is expected to perceive 3D DRAM as one of the solutions to the challenges faced by DRAM technology, marking it as a pivotal direction for the future memory market.

Is 3D DRAM similar to 3D NAND? How will the industry address technological bottlenecks such as size limitations? What are the strategies of major players in the field?

  • Understanding 3D DRAM Technology

The circuitry of DRAM consists of a transistor and a capacitor, where the transistor is responsible for transmitting electrical currents to write or read information (bits), while the capacitor stores the bits.

DRAM finds wide application in modern digital electronic devices such as computers, graphics cards, portable devices, and gaming consoles, due to its low cost and high capacity memory.

The development of DRAM primarily focuses on increasing integration by reducing circuit line widths. However, as line widths reach the 10nm range, physical limitations such as capacitor current leakage and interference significantly increase.

To address these issues, the industry has introduced new materials and equipment like high dielectric constant (high-K) deposition materials and Extreme Ultraviolet (EUV) devices.

Nevertheless, from the perspective of chip manufacturers, miniaturizing the manufacturing of 10nm or more advanced chips remains a significant challenge in current technology research and development. Additionally, the competition for advanced processes, particularly at 2nm and below, has intensified recently.

In an era marked by continuous technological advancements, the semiconductor industry has turned its attention to the evolution of NAND technology. To overcome scaling limitations, transistors are transitioning from a planar to a 3D architecture, increasing the number of storage units per unit area. This concept of 3D DRAM architecture has entered the public sphere.

In traditional DRAM, transistors are integrated on a flat plane. However, in 3D DRAM, transistors are stacked into multiple layers, thereby dispersing the transistors. It is believed that adopting a 3D DRAM structure can widen the gaps between transistors, reducing leakage currents and interference.

From a theoretical perspective, 3D DRAM technology breaks the conventional paradigm of memory technology. It is a novel storage method that stacks storage cells above logic units, enabling higher capacities within a unit chip area.

In terms of differentiation, traditional DRAM requires complex operational processes for reading and writing data, whereas 3D DRAM can directly access and write data through vertically stacked storage units, significantly enhancing access speeds. The advantages of 3D DRAM not only include high capacity and fast data access but also low power consumption and high reliability, meeting various application needs.

In terms of application areas, the high speed and large capacity of 3D DRAM will help improve the efficiency and performance of high-performance computing. The compact size and large capacity of 3D DRAM make it an ideal memory solution for mobile devices. The large capacity and low power consumption characteristics of 3D DRAM can meet the real-time data processing and transmission requirements of the Internet of Things (IoT) field.

Furthermore, since the advent of the AI era with ChatGPT, AI applications have surged, and AI servers are expected to become a strong driving force for the long-term growth in storage demand.

Micron’s chief business officer previously stated in an interview with Reuter that a typical AI server has up to eight times the amount of DRAM and three times the amount of NAND that a normal server has.

  • Continued Industry Focus on 3D DRAM

The DRAM market remains highly concentrated, currently dominated by key players such as Samsung Electronics, SK Hynix, and Micron Technology, collectively holding over 93% of the entire market share.

According to a report from TrendForce, as of the third quarter of 2023, Samsung leads the global market with a share of 38.9%, followed by SK Hynix (34.3%) and Micron Technology (22.8%).

Currently, 3D DRAM is in its early stages of development, with companies like Samsung actively joining the research and development battleground. The competition is intense as various players strive to lead in this rapidly growing market.

  • Samsung: 4F2 DRAM

Since 2019, Samsung has been conducting research on 3D DRAM and announced the industry’s first 12-layer 3D-TSV (Through-Silicon Via) technology in October of the same year. In 2021, Samsung established a next-generation process development research team within its DS division, focusing on research in this field.

At the 2022 SAFE Forum, Samsung outlined the overall 3DIC journey of Samsung Foundry and indicated its readiness to address DRAM stacking issues with a logic-stacked chip, SAINT-D. The design aims to integrate eight HBM3 chips onto one massive interposer chip.

In May 2023, as per sources cited by “The Elec,” Samsung Electronics formed a development team within its semiconductor research center to mass-produce 4F2 structured DRAM.

The goal is reportedly to apply 4F2 to DRAM at 10nm processes or more advanced nodes, as DRAM cell scaling has reached its limit. The report suggests that if Samsung’s 4F2 DRAM storage unit structure research is successful, the chip die area can be reduced by around 30% compared to existing 6F2 DRAM storage unit structures without changing the node.

In October of the same year, at the “Memory Technology Day” event, Samsung Electronics announced its plans to introduce a new 3D structure in the next-generation 10-nanometer more advanced nodes DRAM, rather than the existing 2D planar structure. The aim of this project is to increase the production capacity of a chip by over 100G.

At the “VLSI Symposium” held in Japan last year, Samsung Electronics presented a paper containing research results on 3D DRAM and showcased detailed images of 3D DRAM as an actual semiconductor implementation.

According to a report by The Economic Times, Samsung Electronics recently announced the opening of a new R&D laboratory in Silicon Valley, USA, dedicated to the development of next-generation 3D DRAM.

The laboratory is operated under Silicon Valley’s Device Solutions America (DSA) and is responsible for overseeing Samsung’s semiconductor production in the United States, as well as focusing on the development of new generations of DRAM products.

  • SK Hynix – Introducing IGZO as the Channel Material for Future DRAM

Per SK Hynix’s research, the IGZO channel is attracting attention to improve the refresh characteristics of DRAM.

Reportedly, IGZO thin film transistors have been used in the display industry for a long time due to their moderate carrier mobility, extremely low leakage current and substrate size scalability. It can be a candidate for a stackable channel material for future DRAM.

  • NEO – 3D X-DRAM Offers 8x Density Boost

NEO Semiconductor, a US memory technology company, introduces its groundbreaking technology, 3D X-DRAM, aimed at overcoming the capacity limitations of DRAM.

3D X-DRAM features the first-ever array structure of DRAM units based on Floating Body Cell (FBC) technology, akin to 3D NAND. Similar to 3D NAND Flash, its logic involves stacking layers to increase memory capacity. The FBC technology in 3D NAND Flash enables the formation of a vertical structure with the addition of a layer mask, offering high yield, low cost, and a significant density boost.

According to Neo’s estimates, the 3D X-DRAM technology can achieve a density of 128 Gb across 230 layers, which is eight times the current density of DRAM. NEO proposes a target of an eightfold capacity increase every decade, aiming to achieve a capacity of 1Tb between 2030 and 2035, representing a 64-fold increase compared to the current core capacity of DRAM.

This expansion is intended to meet the growing demand for high-performance and large-capacity semiconductor storage, especially for AI applications like ChatGPT.

“3D X-DRAM will be the absolute future growth driver for the Semiconductor industry,” said Andy Hsu, Founder and CEO of NEO Semiconductor.

  • Japanese Research Team: BBCube 3D Outperforms DDR5 by 30x

A research team at the Tokyo Institute of Technology in Japan has introduced a groundbreaking 3D DRAM stacking design technology called BBCube, which enables superior integration between processing units and DRAM.

The most significant aspect of BBCube 3D lies in achieving a three-dimensional connection between processing units and DRAM instead of the traditional two-dimensional linkages. The team employs an innovative stacking structure while using an innovative stacked structure in which the PU dies sit atop multiple layers of DRAM, all interconnected via through-silicon vias (TSVs).

The overall structure of BBCube 3D is compact, devoid of typical solder microbumps, and utilizes TSVs instead of longer wires, collectively contributing to achieving low parasitic capacitance and low resistance, thereby enhancing the electrical performance of the device in various aspects.

The research team evaluated the speed of the new architecture and compared it with two of the most advanced memory technologies, DDR5 and HBM2E. Researchers claim that BBCube 3D could potentially achieve a bandwidth of 1.6 terabytes per second, which is 30 times higher than DDR5 and 4 times higher than HBM2E.

Furthermore, due to features like low thermal resistance and low impedance in BBCube, potential thermal management and power issues associated with 3D integration could be mitigated. The new technology significantly improves bandwidth while consuming only 1/20 and 1/5 of the bit access energy compared to DDR5 and HBM2E, respectively.

  • Conclusion

The evolution of DRAM technology from 1D to 2D and now to the diverse structures of 3D has offered the industry various solutions to address its challenges. However, optimizing and improving manufacturing costs, durability, and reliability remain significant challenges in advancing 3D DRAM technology. Due to the difficulties in developing new materials and physical limitations, the commercialization of 3D DRAM still requires some time.

Based on the current research progress, the industry is actively engaged in the development of 3D DRAM, which are still in the early stages. According to industry insiders, it is predicted that 3D DRAM will begin to emerge around 2025, with actual mass production becoming feasible after 2030.

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(Photo credit: Samsung)

Please note that this article cites information from DRAMeXchangeThe Economic Times, and The Elec.


[News] Memory Giants Plan DDR5, HBM Expansion; No Immediate Impact on Taiwanese DDR4 Pricing

The recovery of the memory industry is evident, with Taiwanese companies such as Macronix, Nanya Technology, and Transcend all showing month-on-month revenue growth in December last year. Additionally, contract prices for DRAM and NAND Flash are expected to continue rising in the first quarter of 2024. However, the global second-largest memory manufacturer, SK Hynix, plans a expansion, introducing a variable element to the memory market.

According to a report by the Commercial Times, SK Hynix disclosed that it might reduce the scale of DRAM production cuts in the first quarter, while adjustments to the NAND Flash production strategy may occur in the second or third quarter, depending on the situation.

In response to major memory manufacturers’ expansion plans, Taiwanese memory firms believe that Hynix’s expansion should focus primarily on DDR5 and HBM (High-Bandwidth Memory) products. Nevertheless, Taiwan currently specializes in DDR4 products, and it is not expected to impact product pricing.

According to a press release from TrendForce published this week, the DRAM contract prices are estimated to increase by approximately 13–18% in 1Q24 with mobile DRAM leading the surge. It appears that due to the unclear demand outlook for the entire year of 2024, manufacturers believe that sustained production cuts are necessary to maintain the supply-demand balance in the memory industry.

For consumer DRAM, manufacturers are aggressively raising contract prices, which has prompted buyers to stockpile early. This has greatly improved purchasing momentum. However, the first quarter coincides with the industry’s off-season, and end sales are expected to be weak and lead to increased inventory levels due to buyers’ early stocking strategies.

Manufacturers generally believe that in 2024—with the expanding penetration of HBM and DDR5 each quarter—low-margin DDR4 capacity will be crowded out, thereby leading to shortages. As such, DDR4 contract prices are expected to outpace DDR3 in the first quarter by 10–15%. DDR3 continues to be supplied by Taiwanese manufacturers, and with generally high inventory levels, its contract price increase is estimated at 8–13% for 1Q24.

(Image: SK Hynix)

Please note that this article cites information from Commercial Times


[News] Nanya Technology Optimistic About DRAM Market, Expects Possible Supply Shortage and Turnaround in H2

Pei-Ing Lee, the General Manager of Nanya Technology, a major DRAM manufacturer, mentioned on January 10th that this year has seen an upward trend in DRAM prices

According to Economic Daily News citnig from Nanya Technology’s earnings call for 23Q4,  this trend is attributed to the resurgence of the smartphone market, increased demand fueled by AI, and the three major memory manufacturers pivoting towards DDR5 production. This shift is advantageous for depleting DDR4 inventory and could potentially result in a supply shortage.

Having endured over a year of downturn in the memory market, Lee expressed an optimistic outlook by stating that “there is a possibility of future supply shortages,” revealing an overall positive trajectory for the DRAM market.

Lee acknowledged that the DRAM market faced challenges last year, resulting in stagnant bit sales for Nanya Technology. However, he anticipates a better scenario this year, noting the upward trend in DDR4 pricing. The timing for DDR3 price increases is expected to follow but at a slower pace. Lee further stated that DDR3 constituted about 40% of Nanya Technology’s revenue  in the past, but it is expected to decrease, with DDR4’s share rising.

Due to major international players focusing on High-Bandwidth Memory (HBM) and DDR5, he anticipates a potential supply shortage for DDR4 this year.

Lee pointed out that the growth in AI demand is positively impacting the DRAM market. The shift from high-end HBM and DDR4 to DDR5 is influencing demand, showing improvement quarter by quarter.

Regarding pricing trends, he confirmed a rebound in prices in the fourth quarter of 2023 and expressed optimism for a gradual upward trend in 2024. However, Lee cautioned that external variables such as geopolitical tensions, the war in Europe, and the U.S.-China trade dispute could still impact the market’s recovery momentum.

In terms of demand, Lee highlighted four key points. Firstly, server demand is driven by AI servers, with a focus on observing IT spending by U.S. cloud companies. Secondly, the introduction of new smartphones, leading to an increase in average DRAM capacity, especially in AI smartphones boosting the high-end smartphone market. Presently, improving smartphone sales in China are observed, and the recovery momentum of the Chinese economy is crucial.

In the PC application sector, Lee mentioned that inventory is gradually returning to normal levels, and AI PCs will simultaneously boost the high-end PC market. As for consumer electronic terminal products, demand for IP cameras, networking, industrial control, and automotive applications is relatively healthy, with consumer electronic products expected to show stable growth in 2024.

In terms of technological advancements, Nanya Technology aims to begin small-scale production of DDR5 products at the end of the third quarter of this year. Initially applied in servers and partly in PCs, the first product is expected to achieve a bandwidth of 5600MHz, while the second product is currently in the design phase, with an estimated bandwidth of 6400MHz.

Lee explained that their second DDR5 product will utilize third-generation processes, aiming to further improve cost structures, increase speed, achieve a target of 6400 MHz, and possess the capability for high density and 3D IC technology.

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(Photo credit: Nanya Technology)

Please note that this article cites information from Economic Daily News


[Tech Recap and Glimpse 5-5] Changes in the Landscape of the AI Chip Market After a Year of NVIDIA’s Dominance

Major Cloud Service Providers (CSPs) continue to see an increase in demand for AI servers over the next two years. The latest projections of TrendForce indicate a global shipment of approximately 1.18 million AI servers in 2023, with a year-on-year growth of 34.5%. The trend is expected to persist into the following year, with an estimated annual growth of around 40.2%, constituting over 12% of the total server shipments.

NVIDIA, with its key products including AI-accelerating GPU and the AI server reference architecture HGX, currently holds the highest market share in the AI sector. However, it is crucial to monitor CSPs developing their own chips and, in the case of Chinese companies restricted by U.S. sanctions, expanding investments in self-developed ASICs and general-purpose AI chips.

According to TrendForce data, AI servers equipped with NVIDIA GPUs accounted for approximately 65.1% this year, projected to decrease to 63.5% next year. In contrast, servers featuring AMD and CSP self-developed chips are expected to increase to 8.2% and 25.4%, respectively, in the coming year.

Another critical application, HBM (High Bandwidth Memory), is primarily supplied by major vendors Samsung, SK Hynix, and Micron, with market shares of approximately 47.5%, 47.5%, and 5.0%, respectively, this year. As the price difference between HBM and DDR4/DDR5 is 5 to 8 times, this is expected to contribute to a staggering 172% year-on-year revenue growth in the HBM market in 2024.

Currently, the three major manufacturers are expected to complete HBM3e verification in the first quarter of 2024. However, the results of each manufacturer’s HBM3e verification will determine the final allocation of procurement weight for NVIDIA among HBM suppliers in 2024. As the verifications are still underway, the market share for HBM in 2024 remain to be observed.

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(Photo credit: NVIDIA)


[News] Bypassing U.S. Restrictions? CXMT Showcases GAA Technology for 3nm Chips

According to a news report from UDN, despite U.S. restrictions on the exportation of technologies related to advanced semiconductor processes, China is fortifying its independent chip development capabilities.

ChangXin Memory Technologies (CXMT), a Chinese DRAM chip manufacturer, presented a paper at the 69th IEEE International Electron Devices Meeting (IEDM) in San Francisco, showcasing a Gate-All-Around (GAA) technology applicable to cutting-edge 3nm chips.

According to an article from South China Morning Post, while CXMT has not yet released sample products, the evidence of the company’s next-generation memory production has caught the attention of industry analysts. This is noteworthy because the design of such chips typically involves technology subject to U.S. export restrictions.

Frederick Chen, a memory expert at Winbond Electronics, a Taiwan-based company, said the evidence of progress by CXMT is “impressive”, as it shows that the Chinese company is not far away from state-of-the-art research and products. “It’s significant because Samsung Electronics is trying to do the same.” Chen said.

Regarding this matter, CXMT has maintained a relatively low profile. Reportedly, in a statement to the South China Morning Post on Wednesday, CXMT stated that the paper “describes fundamental research related to DRAM structure and the feasibility of 4F2 design” and “it has nothing to do with CXMT’s current production processes.” This may have implied that the conceptual design is still distant from becoming a market-ready product.

“Any accusation that CXMT is violating US sanctions or export controls is completely inaccurate,” the company’s export control experts said. “We firmly believe that the free flow of ideas that IEDM seeks to foster is essential for the industry’s innovation and development.”

At the end of this November, CXMT released China’s first LPDDR5 chip, marking the entry of Chinese manufacturers into the DDR5 competition and narrowing the technological gap with leading memory suppliers such as South Korea’s Samsung and SK Hynix.

(Photo credit: CXMT)

Please note that this article cites information from UDN and South China Morning Post.

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