According to a report by Taiwan’s Commercial Times, TSMC is facing a tight supply of advanced packaging capacity, with its Taichung factory ramping up equipment support at a rapid pace. Industry insiders have disclosed that TSMC’s annual production capacity for the backend CoWoS (Chip-on-Wafer-on-Substrate) advanced packaging is only 150,000 to 300,000 units, falling short of customer demand by over 20%.

To address this shortfall, TSMC officially inaugurated its advanced packaging and testing Plant 6 in Zhunan in June. TSMC’s management has also committed to steadily increasing CoWoS production capacity each quarter, and third-party testing facilities are being actively engaged to bridge the gap.

It is worth noting that TSMC’s Longtan factory has traditionally been a key hub for CoWoS and InFO (Integrated Fan-Out) packaging, with a primary focus on InFO production at approximately 100,000 units per month and a smaller portion allocated to CoWoS. Although some of the InFO capacity has been relocated to the Southern Taiwan Science Park, Longtan’s physical space constraints continue to make Zhunan the primary location for CoWoS expansion. TSMC’s Taichung AP5 factory, on the other hand, is prioritizing WoS (Wafer-on-Substrate) expansion, with CoW (Chip-on-Wafer) expansion slated to commence next year. Many equipment suppliers have reportedly received urgent orders related to these expansion efforts.

Analysts estimate that this year’s overall CoWoS production will reach 110,000 units, doubling to 250,000 units next year. However, analysts caution that while TSMC currently dominates the CoWoS production landscape, other players are gradually entering the field. Therefore, it is crucial to monitor whether an oversupply situation may emerge in the mid-term next year.

(Photo credit: TSMC)

As semiconductor process technology nears known physical limits, the spotlight among major industry players is shifting towards the development of advanced packaging. Concurrently, the rise of applications like artificial intelligence and AIGC has propelled the concept of advanced packaging into a new technological wave. In the midst of the semiconductor industry’s global competition, securing more orders has become a core objective for major players.

A Competitive Landscape in Advanced Packaging

The competition in advanced packaging technology is intensifying, with companies pouring substantial investments into the field, resulting in a landscape of vigorous competition. Various packaging technologies have emerged, with notable offerings from industry giants such as TSMC, Intel, and Samsung.

TSMC introduced 3DFabric, an integration of its TSMC-SoIC front-end technology with CoWoS and InFO back-end technologies, providing maximum flexibility for diverse innovative product designs.

Intel, on the other hand, features its 2.5D EMIB and 3D Foveros packaging technologies. EMIB is applied in the connection of logic chips and high-bandwidth memory, as seen in the Intel Xeon Max series and Intel Data Center GPU Max series.

Foveros allows top dies to overcome size limitations and accommodate more top and base dies, connected through copper pillars to reduce potential interference from through-silicon vias (TSVs).

Samsung also exhibits strong competitiveness in advanced packaging, with its 2.5D I-Cube4 and H-Cube, along with 3D X-Cube packaging technologies, achieving breakthroughs in multi-chip interconnects and integration.

Samsung’s I-Cube4, for example, integrates four HBM stack dies and one core compute IC on the silicon interposer layer, while H-Cube enhances packaging area through the stacking of HDI PCBs to accommodate designs with six or more HBM stack dies.

Advantages of the Three Giants

In recent years, the three semiconductor giants have directed substantial capital expenditure towards advanced packaging. Their diverse technological developments and marketing strategies are poised to ignite a global battle in the semiconductor advanced packaging industry.

TSMC holds the advantage with its dominant wafer process technology and an end-to-end comprehensive service approach. Coupled with Taiwan’s robust semiconductor ecosystem, TSMC leads the way in the advanced packaging domain.

Intel, while slightly trailing TSMC in advanced process technology, matches it in advanced packaging capabilities. Emphasizing flexible foundry services, Intel allows clients to mix and match its wafer manufacturing and packaging offerings. With manufacturing facilities scattered worldwide, Intel leverages geographic advantages, particularly in Western countries, to expand capacity and services, leading to anticipated gains in the future.

Samsung, like TSMC, offers end-to-end services, but its packaging technology lags behind TSMC’s. It secures a share in constrained supply situations. Notably, Samsung, in June 2022, was ahead of TSMC in unveiling the innovative GAA 3nm process, and is poised to combine it with 3D packaging technology, potentially marking a pivotal point in the next semiconductor generation.

With semiconductor technology’s continuous evolution and surging market demand, the competition among the three giants in advanced packaging will remain fierce. While wafer fabs currently prioritize processes, the next three to five years are expected to witness a gradual shift towards advanced packaging. Different packaging technologies and marketing strategies will ultimately determine companies’ positions and influence in the market.

(Photo credit: TSMC)

Read more:

• An In-Depth Explanation of Advanced Packaging Technology: CoWoS
• ASE, Amkor, UMC and Samsung Getting a Slice of the CoWoS Market from AI Chips, Challenging TSMC

Intel has outsourced the production of about 15-20% of its non-CPU chips, with most of the wafer starts for these products assigned to TSMC and UMC, according to TrendForce’s latest investigations. While the company is planning to kick off mass production of Core i3 CPUs at TSMC’s 5nm node in 2H21, Intel’s mid-range and high-end CPUs are projected to enter mass production using TSMC’s 3nm node in 2H22.

In recent years, Intel has experienced some setbacks in the development of 10nm and 7nm processes, which in turn greatly hindered its competitiveness in the market. With regards to smartphone processors, most of which are based on the ARM architecture, Apple and HiSilicon have been able to announce the most advanced mobile AP-SoC ahead of their competitors, thanks to TSMC’s technical breakthroughs in process technology.

With regards to CPUs, AMD, which is also outsourcing its CPU production to TSMC, is progressively threatening Intel’s PC CPU market share. Furthermore, Intel lost CPU orders for the MacBook and Mac Mini, since both of these products are now equipped with Apple Silicon M1 processors, which were announced by Apple last year and manufactured by TSMC. The aforementioned shifts in the smartphone and PC CPU markets led Intel to announce its intention to outsource CPU manufacturing in 2H20.

TrendForce believes that increased outsourcing of its product lines will allow Intel to not only continue its existence as a major IDM, but also maintain in-house production lines for chips with high margins, while more effectively spending CAPEX on advanced R&D. In addition, TSMC offers a diverse range of solutions that Intel can use during product development (e.g., chiplets, CoWoS, InFO, and SoIC). All in all, Intel will be more flexible in its planning and have access to various value-added opportunities by employing TSMC’s production lines. At the same time, Intel now has a chance to be on the same level as AMD with respect to manufacturing CPUs with advanced process technologies.

(Cover image source: Taiwan Semiconductor Manufacturing Company, Limited )

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