IC Design


[News] IC Design Companies Seek Advanced Process Second Source, Overview of Competition Between TSMC and Samsung

According to TechNews’ report, Apple, NVIDIA, AMD, Qualcomm, and MediaTek all utilize TSMC’s semiconductor processes for manufacturing their latest chips, with some potentially employing Samsung’s foundry, though typically not for flagship products.

With Samsung’s improved yield rates in recent months, the company is eager to secure a portion of the orders, particularly for the 3-nanometer GAA (Gate-All-Around) process.

Earlier market reports suggested that Qualcomm’s Snapdragon 8 Gen 4 might adopt a dual-foundry strategy, simultaneously utilizing TSMC’s N3E process technology and Samsung’s SF3E process technology.

However, both Qualcomm and MediaTek currently plan to employ TSMC’s second-generation 3-nanometer process technology (N3E) for manufacturing chips like the Snapdragon 8 Gen 4 and Dimensity 4, without pursuing a dual-foundry strategy at this time.

As of the end of June 2022, Samsung announced the commencement of production for 3-nanometer process chips at its Hwaseong Industrial Complex in South Korea. These chips incorporate a new GAA transistor architecture technology, rumored to be more energy-efficient compared to TSMC’s 3-nanometer FinFET technology. Despite this, in the realm of 3nm, Samsung has yet to secure substantial orders from major clients.

Interestingly, the company has seen more success in the 4nm domain. It is reported that Samsung has gradually addressed yield and various issues in the 4-nanometer process technology domain. The third generation of 4-nanometer process technology has seen improvements in performance, reduced power consumption, increased density, and achieved yields close to TSMC’s level. Market sources indicate that Samsung has gained recognition from companies like AMD and Tesla, securing new orders.

Currently, TSMC’s 3-nanometer process technology production capacity is ramping up, with an expected monthly capacity of 100,000 wafers by the end of 2024. The revenue contribution is projected to increase from the current 5% to 10%.

Meanwhile, Samsung plans to introduce the second generation of its 3-nanometer process technology, named SF3 (3GAP), in 2024. Building upon the existing SF3E, it aims for further optimization, and Samsung’s in-house Exynos 2500 is expected to be one of the first high-performance chips to adopt this new process technology.

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[Insights] MediaTek Collaborates with Meta to Develop Next-Generation Smart Glasses Chip

MediaTek announced a collaboration with Meta to develop its next-generation smart glasses chip. Since Meta has previously used Qualcomm chips for its two generations of smart glasses products, it is speculated that Meta’s expansion of chip suppliers is aimed at maintaining supply chain flexibility and reducing costs. MediaTek, in turn, is poised to leverage smart glasses to tap into opportunities within Meta’s VR/AR devices.

 TrendForce’s Insights:

  1. Meta Expands Chip Collaboration Suppliers, Maintaining Product Development Flexibility and Potential Cost Reduction

In mid-November 2023, MediaTek hosted the overseas summit, Mediatek Executive Summit 2023, where it announced a collaboration with Meta to develop the next-generation smart glasses chip.

Meta’s first smart glasses, a collaborative creation with Ray-Ban in 2021, differ from the Quest series as they are not high-end VR devices but rather feature a simpler design, focusing on additional functionalities like music playback and phone calls.

In the fall of 2023, Meta introduced a successor product with significant improvements in camera resolution, video quality, microphones, and internal storage. This new device is designed to simplify the recording and live streaming process by integrating with Meta’s social platform. Additionally, the new product aligns with the trend of generative AI and incorporates Meta’s AI voice assistant based on Llama2 LLM.

Notably, the market has shown keen interest and discussion regarding MediaTek’s announcement on the collaboration with Meta, given that Meta’s previous two generations of smart glasses used Qualcomm chips, specifically the Qualcomm Snapdragon Wear 4100 for the older version and the AR1 Gen1 for the new version.

Analysis of Meta’s Motivation: Meta’s decision to collaborate with MediaTek may be driven by considerations of risk diversification among suppliers and overall cost reduction.

Firstly, Meta has been investing in the development of in-house chips in recent years to ensure flexibility in product development. Examples include the MTIA chip, disclosed in mid-2023, designed for processing inference-related tasks, and the MSVP, the first in-house ASIC chip for video transcoding, which is expected to be used in VR and AR devices.

Given Meta’s previous attempts, including collaboration with Samsung, to independently develop chips and move towards chip autonomy, the partnership with MediaTek can be seen as a risk mitigation strategy against vendor lock-in.

Secondly, considering that smart glasses, unlike the high-priced Quest series, are currently priced at USD 299 for both models, MediaTek’s competitive pricing may also be a significant factor in Meta’s decision to collaborate with them.

  1. MediaTek Eyes VR and AR Device Market Opportunities Through Smart Glasses Collaboration with Meta

From MediaTek’s perspective, their focus extends beyond smart glasses to the vast business opportunities presented by Meta’s VR and AR devices. In reality, examining Meta’s smart glasses alone reveals estimated shipments of around 300,000 pairs for the older model. Even with the new model and the anticipated successor expected to launch in 2025, there is currently no clear indication of significant market momentum.

In practical terms, this collaboration with Meta might not contribute substantially to MediaTek’s revenue. The crucial aspect of MediaTek’s collaboration with Meta lies in strategically positioning itself in Meta’s smart headwear supply chain, challenging the dominance of the original chip supplier, Qualcomm.

Looking at global VR device shipments, Meta is projected to hold over 70% market share in 2023 and 2024. There are also reports of an updated version of the Quest device expected to be available in China in late 2024. If MediaTek can expand its collaboration with Meta further, coupled with the gradual increase in the penetration rate of VR and AR devices, significant business opportunities still lie ahead.

From an overall perspective of the VR and AR industry, the current design of headwear devices no longer resembles the early models that required external computing cores due to considerations of cost, power, and heat.

The prevalent mainstream designs are now standalone devices. Given that these devices not only execute the primary application functions but also handle and consolidate a substantial amount of data from sensors to support functions like object tracking and image recognition, VR and AR devices require high-performance chips or embedded auxiliary SoCs. This market demand and profit potential are compelling enough to attract chip manufacturers, especially in the face of the gradual decline in momentum in the consumer electronics market, such as smartphones.

The VR and AR market still holds development potential, making it a strategic entry point for manufacturers. This insight is evident in MediaTek’s motivation, continuing its market cultivation efforts after developing the first VR chip for Sony PS VR2 in 2022 and collaborating with Meta.


[Insights] Microsoft Unveils In-House AI Chip, Poised for Competitive Edge with a Powerful Ecosystem

Microsoft announced the in-house AI chip, Azure Maia 100, at the Ignite developer conference in Seattle on November 15, 2023. This chip is designed to handle OpenAI models, Bing, GitHub Copilot, ChatGPT, and other AI services. Support for Copilot, Azure OpenAI is expected to commence in early 2024.

TrendForce’s Insights:

  1. Speculating on the Emphasis of Maia 100 on Inference, Microsoft’s Robust Ecosystem Advantage is Poised to Emerge Gradually

Microsoft has not disclosed detailed specifications for Azure Maia 100. Currently, it is known that the chip will be manufactured using TSMC’s 5nm process, featuring 105 billion transistors and supporting at least INT8 and INT4 precision formats. While Microsoft has indicated that the chip will be used for both training and inference, the computational formats it supports suggest a focus on inference applications.

This emphasis is driven by its incorporation of the less common INT4 low-precision computational format in comparison to other CSP manufacturers’ AI ASICs. Additionally, the lower precision contributes to reduced power consumption, shortening inference times, enhancing efficiency. However, the drawback lies in the sacrifice of accuracy.

Microsoft initiated its in-house AI chip project, “Athena,” in 2019. Developed in collaboration with OpenAI. Azure Maia 100, like other CSP manufacturers, aims to reduce costs and decrease dependency on NVIDIA. Despite Microsoft entering the field of proprietary AI chips later than its primary competitors, its formidable ecosystem is expected to gradually demonstrate a competitive advantage in this regard.

  1. U.S. CSP Manufacturers Unveil In-House AI Chips, Meta Exclusively Adopts RISC-V Architecture

Google led the way with its first in-house AI chip, TPU v1, introduced as early as 2016, and has since iterated to the fifth generation with TPU v5e. Amazon followed suit in 2018 with Inferentia for inference, introduced Trainium for training in 2020, and launched the second generation, Inferentia2, in 2023, with Trainium2 expected in 2024.

Meta plans to debut its inaugural in-house AI chip, MTIA v1, in 2025. Given the releases from major competitors, Meta has expedited its timeline and is set to unveil the second-generation in-house AI chip, MTIA v2, in 2026.

Unlike other CSP manufacturers, both MTIA v1 and MTIA v2 adopt the RISC-V architecture, while other CSP manufacturers opt for the ARM architecture. RISC-V is a fully open-source architecture, requiring no instruction set licensing fees. The number of instructions (approximately 200) in RISC-V is lower than ARM (approximately 1,000).

This choice allows chips utilizing the RISC-V architecture to achieve lower power consumption. However, the RISC-V ecosystem is currently less mature, resulting in fewer manufacturers adopting it. Nevertheless, with the growing trend in data centers towards energy efficiency, it is anticipated that more companies will start incorporating RISC-V architecture into their in-house AI chips in the future.

  1. The Battle of AI Chips Ultimately Relies on Ecosystems, Microsoft Poised for Competitive Edge

The competition among AI chips will ultimately hinge on the competition of ecosystems. Since 2006, NVIDIA has introduced the CUDA architecture, nearly ubiquitous in educational institutions. Thus, almost all AI engineers encounter CUDA during their academic tenure.

In 2017, NVIDIA further solidified its ecosystem by launching the RAPIDS AI acceleration integration solution and the GPU Cloud service platform. Notably, over 70% of NVIDIA’s workforce comprises software engineers, emphasizing its status as a software company. The performance of NVIDIA’s AI chips can be further enhanced through software innovations.

On the contrary, Microsoft possess a robust ecosystem like Windows. The recent Intel Arc GPU A770 showcased a 1.7x performance improvement in AI-driven Stable Diffusion on Microsoft Olive, this demonstrates that, similar to NVIDIA, Microsoft has the capability to enhance GPU performance through software.

Consequently, Microsoft’s in-house AI chips are poised to achieve superior performance in software collaboration compared to other CSP manufacturers, providing Microsoft with a competitive advantage in the AI competition.

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[News] Samsung Reportedly Lands a 4nm Mega Order – Why is AMD Switching to “Dual Foundry Mode” for Its Next-Gen Chips?

According to TechNews’ report, there are recent rumors indicating that AMD’s next-generation chip, with the Zen5C architecture codenamed “Prometheus,” will adopt a “Dual Foundry Mode.” This means it will simultaneously utilize TSMC’s 3nm and Samsung’s 4nm processes. This move suggests that AMD aims to diversify chip manufacturing, avoiding reliance solely on TSMC for its upcoming products.

Industry sources suggest that factors such as geopolitical considerations, negotiation tactics, and the overall semiconductor manufacturing ecosystem drive the search for secondary sources. AMD’s decision to employ a dual foundry approach is likely a strategic move to mitigate risks in this dynamic landscape.

Reportedly, Samsung’s 4nm process will primarily be utilized for the base version of Prometheus, while TSMC’s 3nm process will be employed for the high-end variant of Prometheus.

EXTREMETECH finds AMD’s move intriguing, speculating that it might stem from uncertainty about sourcing all chips exclusively from TSMC. This is significant for Samsung, historically excluded from the consumer tech and gaming sector. Since NVIDIA switched from Samsung to TSMC for the production of Ampere GPUs using the 8nm process, Samsung has been left out of the equation.

If the collaboration between AMD and Samsung proves successful, other companies may also consider shifting to Samsung. Reports suggest that AMD’s choice of Samsung’s 4nm process over the 3nm process could be attributed to potential yield challenges.

While it’s uncertain whether AMD will indeed implement the “Dual Foundry Mode,” the anticipation for the Zen5 architecture next year is high. Samsung is currently ahead of the industry in the adoption of GAA (Gate-All-Around) technology for its manufacturing processes, introducing GAA technology with their 3nm process ahead of others in the industry. TSMC, on the other hand, is anticipated making a similar change no earlier than 2025.

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(Photo credit: AMD)


[News] IC Design Industry Thrives Amidst Inventory and OEM Price Declines

Amid a two-year recalibration in the smartphone and electronic component supply chain, inventory levels have rebounded to a healthy state. The infusion of new applications like AI and auto driving has fueled a comprehensive replenishment of consumer electronics inventory, propelling IC design with a surge in urgent and short orders.

Although wafer prices surged by over 40% during the pandemic, recent declines in utilization suggest an impending price reduction cycle to maintain operational rates, expected to lead to a reduction in IC design costs. Key players, boasting inventory turnover periods below a hundred days, are well-positioned for a potential upswing in demand, as reported by CTEE.

While most semiconductor companies are anticipated to experience declines in 2023, inventory levels have already tapered off. MediaTek boasts an inventory turnover period of just 89.11 days, with Realtek and ITE Tech at 96.77 and 84.11 days, respectively.

IC design companies emphasize the dominance of rush orders in the latter half of the year. Despite the uncertainty of economic visibility, confidence prevails regarding the new applications like AI, auto driving, and LEO(Low Earth Orbit) satellites, promising an upsurge in demand.

IC design companies also point out that the 3-5 year cycle of device replacement is imminent. The infusion of new AI applications and technological advancements in decision-making and workplace practices is expected to drive business demand. Positive developments, such as Microsoft discontinuing support for Windows 10, are anticipated to gain traction by 2024.

Anticipating 2024, expectations hinge on the U.S. two-year consecutive interest rate hike policy. Global inflation is projected to ease, and consumer momentum is set to recover. Within the IC design sector, a gradual emergence from the trough is foreseen. Fueled by the dual positive factors of heightened demand and reduced costs, the industry is poised to restore itself to prospering conditions and orderliness.
(Image: Mediatek Facebook)

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