[News] MediaTek Advances 400G SerDes on 2nm, Targeting Google TPU v10 and Meta AI ASIC Orders
MediaTek’s AI ASIC ambitions with Google may extend well beyond TPU v9. Commercial Times reports that MediaTek’s 400G/448G SerDes IP, expected to be ready in the second half of 2027, is seen by industry sources as a key enabler for bidding on next-generation AI ASIC programs, including Google’s TPU v10 and Meta’s custom AI chips.
As noted by Commercial Times, MediaTek has already secured a major share of Google’s TPU v9 orders by leveraging its 336G SerDes IP, with mass production expected in early 2028. As its TPU v10 upgrades to 400G/448G SerDes, successful IP validation on schedule could enable MediaTek to compete with Broadcom for future TPU orders, the report adds. This aligns with GF Securities analyst Jeff Pu’s view that MediaTek’s Icefish platform is currently the only officially confirmed TPU v10 project.
The 400G SerDes IP is being developed on the 2nm process, according to the report, positioning MediaTek to extend its advanced-node capabilities into data center AI ASICs and further expand its AI chip footprint.
MediaTek’s Google TPU Roadmap Takes Shape
At last Friday’s earnings call, MediaTek has outlined a two-generation AI ASIC roadmap, widely believed to correspond to Google’s TPU v8 and TPU v9 programs. According to the Economic Daily News, its first-generation AI accelerator ASIC is scheduled to enter mass production in Q4. CEO Rick Tsai, per the report, added the second-generation AI ASIC is progressing as planned, with mass production targeted for early 2028. Riding on this momentum, MediaTek raised its 2027 AI ASIC market share target to 15%–20%, up from 10%–15%.
Beyond Google: MediaTek Eyes Meta’s AI ASIC Opportunity
Meanwhile, Commercial Times suggests Meta is rapidly expanding its AI infrastructure: its Prometheus AI supercluster is designed to exceed 1GW of compute capacity, while the long-term target for Hyperion is 5GW. For comparison, a 600mm rack backplane paired with 200G SerDes delivers only 102.4T–115.2T of bandwidth per compute unit.
Against this backdrop, the report notes that to overcome those interconnect constraints, Meta has been co-developing multiple generations of its MTIA custom AI chips with Broadcom. Industry analysts cited by the report said Meta’s multi-vendor ASIC strategy could create an opening for MediaTek, and if the company completes development of its 400G SerDes IP and combines it with CPC, CPO, and advanced packaging technologies, it could compete for new design wins after 2027.
Intel Packaging Deal Confirmed, Amid Surging Google Demand
Separately, MediaTek’s growing footprint with Google also extends to manufacturing. After months of market speculation that MediaTek had teamed up with Intel on advanced packaging for Google’s next-generation TPU, the company has now made it official. Speaking on Friday’s earnings call, CEO Rick Tsai confirmed for the first time that MediaTek is using Intel’s EMIB-T advanced packaging technology for its AI ASIC program, according to the Economic Daily News.
The confirmation comes as Google’s TPU demand appears to be outgrowing existing supply. Citing a Fubon analyst report, Tom’s Hardware reports that Google plans to order 12–15 million TPU v9 processors in 2028, a volume that could rival or even surpass NVIDIA’s AI GPU shipments.
Notably, meeting such demand may require additional manufacturing capacity beyond TSMC, potentially opening the door for Intel Foundry’s EMIB. The move would also align with earlier reports that Intel secured orders for roughly 3 million TPUs after Google validated its advanced packaging technology, the report adds.
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(Photo Credit: MediaTek)
