[News] SK hynix Reportedly Hires for 3D-Stacked DRAM-on-Logic With a U.S. Customer; Targets On-Device AI

SK hynix is reportedly stepping up development of 3D-stacked DRAM, a next-generation memory technology for on-device AI. According to ZDNet, the company has reportedly begun recruiting 3D-Stacked DRAM-on-Logic Design Engineers through its U.S. subsidiary in San Jose, California. SK hynix is also said to have partnered with a specific customer to develop applications for the technology.

This marks the first time SK hynix has recruited specialists dedicated to 3D-stacked DRAM. As the technology gains attention as a next-generation memory solution for on-device AI, the move is seen as an early effort to prepare for commercialization.

3D-Stacked DRAM-on-Logic: A Next-Generation Memory Architecture

In the job posting, SK hynix said it is seeking engineers to work closely with a U.S. customer to co-design logic dies for 3D-Stacked DRAM-on-Logic, an advanced packaging architecture that vertically integrates DRAM directly on top of a system-on-chip. Unlike package-on-package (PoP), which stacks separately packaged chips, 3D-Stacked DRAM-on-Logic enables much shorter interconnects and more data I/O channels within the same footprint. This can reduce data-transfer latency while improving power efficiency and space utilization, as the report highlights.

The technology is being developed primarily for on-device AI. Because these applications require both high memory bandwidth and low power consumption, conventional package-on-package (PoP) architectures have been identified as a performance bottleneck. The report notes that mobile application processors (APs) are viewed as one of the technology’s most promising applications. As the main processors in smartphones, they rely on some of the industry’s most advanced foundry processes and packaging technologies to support on-device AI. Apple and Qualcomm are among the leading designers of mobile APs, the report adds.

Memory Makers Advance Next-Generation 3D DRAM Roadmaps

The reported development also aligns with SK hynix’s roadmap unveiled at TSMC’s Technology Symposium 2026. According to iNews24, SK hynix President and Chief Development Officer (CDO) Hyun Ahn said AI development is increasingly constrained by memory bottlenecks, requiring new memory architectures beyond incremental improvements. He said the company is working with TSMC to apply its advanced logic process to HBM4 base dies, with plans to expand the technology to High Bandwidth Flash (HBF) and 3D-Stacked DRAM-on-Logic to further integrate memory and logic for higher performance and power efficiency.

Meanwhile, Samsung Electronics is also advancing research into next-generation 3D DRAM. According to Newspim, the company recently published a joint paper with imec, KU Leuven, and Lam Research on a monolithic 3D DRAM architecture using oxide semiconductor channels. The report notes that the research remains at the simulation stage, with no commercialization plans disclosed.

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(Photo credit: SK hynix)