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[News] MediaTek Ramps Up Advanced Packaging Push as TSMC Veteran Shang Hou Calls for More Talent


2026-09-01 Semiconductors editor

AI chip competition is expanding beyond advanced nodes into advanced packaging and silicon photonics. According to UDN News, MediaTek has been strengthening its capabilities in these areas, with Shang Hou, who recently joined the company as vice president of advanced packaging after retiring from TSMC, helping lead the effort. Appearing on August 31 at the SEMICON Taiwan 2026 Silicon Photonics International Forum, Hou said his first task at MediaTek is to “urgently strengthen” its advanced packaging capabilities and continue recruiting talent in the field.

Hou’s move has drawn significant industry attention. As the report highlights, he was deeply involved in TSMC’s advanced packaging and silicon photonics development and named the company’s COUPE (Compact Universal Photonic Engine) silicon photonics integration platform. He also worked on TSVs, chip stacking, and 2.5D CoWoS packaging, making him a key veteran of TSMC’s advanced packaging development.

The report notes that Hou’s move reflects MediaTek’s push to strengthen advanced packaging as it expands into AI data centers and large-scale ASICs. As AI chip competition shifts toward the joint optimization of logic chips, HBM, advanced packaging, and high-speed interconnects, technologies such as 2.5D and 3D packaging, CPO, and silicon photonics are requiring IC designers to consider packaging, thermal management, power delivery, and photonic-electronic integration earlier in the design process.

On the technology front, MoneyDJ notes that MediaTek said at its July earnings call that its 448G SerDes development is on track for completion in the second half of 2027. The company is using co-packaged copper (CPC) for high-speed, energy-efficient interconnects, while its next-generation solutions will move toward CPO, with development already underway on TSMC’s COUPE platform. MediaTek is also offering pre-validated subsystems spanning 3.5D platforms, memory, I/O, and high-speed interconnects to shorten time to market and expand its AI ASIC capabilities toward broader system and platform deployment.

MediaTek Deepens Advanced Packaging Push

Hou is not the only TSMC advanced packaging veteran to recently join MediaTek. As noted by TechNews, Douglas Yu, a key advanced packaging R&D veteran and one of TSMC’s so-called “Six R&D Knights,” joined MediaTek in May. Yu played a pivotal role in developing CoWoS and is expected to strengthen MediaTek’s integration of advanced packaging and chip design.

MediaTek is also diversifying its advanced packaging strategy. According to Commercial Times, the company disclosed during its latest earnings call that its AI ASIC projects are using both TSMC’s CoWoS and Intel’s EMIB-T advanced packaging technologies, signaling a more diversified approach to meet the varying requirements of customers developing large-scale AI chips.

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(Photo credit: MediaTek)

Please note that this article cites information from UDN NewsMoneyDJTechNews, and Commercial Times.


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