[News] Intel Loses Silicon Photonics Lead to TSMC as Patent Filings Reportedly Plummet Since 2023

As silicon photonics becomes a cornerstone of the AI era, AI chip leader NVIDIA and AMD have joined the competition alongside traditional foundries. Yet, Nikkei reports that Intel—the early pioneer in this sector—has seen its patent filings slump, with TSMC overtaking the U.S. giant since 2023.

Nikkei, citing U.S. filing data from January 1, 2015, to July 31, 2025, accessed through Kyoto-based Patentfield, shows that Team Blue consistently filed over 2,500 patents annually from 2015 to 2022—topping 3,000 in some years—before filings dropped to just 2,263 in 2023.

In contrast, Nikkei notes that TSMC and Samsung Electronics—both direct competitors of Intel in foundry services—have increased their filings between 2022 and 2023. While many 2024 filings have yet to be disclosed, current data suggests Intel’s patent output is on a clear downward trend compared with its peers, the report adds.

For more specific detail, MoneyDJ, citing Nikkei, reports that TSMC filed 50 patents related to core silicon photonics technology in the U.S. in 2024—roughly double Intel’s 26 filings. In 2023, the two were reportedly neck-and-neck with 46 and 43 filings respectively, while previously Intel had maintained a clear lead.

Notably, the report further highlights that TSMC plans to mass-produce semiconductors using the latest Co-Packaged Optics (CPO) technology by 2026, whereas Intel is still at the R&D and demonstration stage.

Intel’s declining silicon photonics patents mirror its broader retreat from cutting-edge tech, including foundry services (18A remains mostly an internal node) and glass substrates. According to ETNews, Intel is now licensing its glass substrate technology to external partners for royalties—a clear pivot from internal development to monetization.

TSMC’s Silicon Photonics Progress

Meanwhile, industry sources cited by Commercial Times point out that 3D Integrated Circuits (3DIC), chiplets, and Co-Packaged Optics (CPO) are key to breaking through AI chip performance barriers, with TSMC making significant strides in CPO technology.

The report further explains that TSMC’s COUPE (Compact Universal Photonic Engine) is extremely advanced, packing around 220 million transistors and 1,000 optical components into a three-layer design. The EIC (Electronic Integrated Circuit) chip uses cutting-edge 6nm manufacturing, while the PIC (Photonic Integrated Circuit) uses 65nm technology, and both can connect light signals horizontally and vertically, as noted by Commercial Times.

In addition, Commercial Times notes that TSMC is moving toward CPO—a technology that combines computing chips directly with optical components in the same package, rather than placing them separately on circuit boards.

As Economic Daily News reported, TSMC has integrated CPO with CoWoS and SoIC advanced packaging. It plans to enter the 1.6T optical era in late 2025 and ramp up shipments in 2026, aligning with NVIDIA’s rollout of Spectrum-X and Quantum-X silicon photonics switches.

Read more

• [News] TSMC Advances in Silicon Photonics: Broadcom and NVIDIA Set to Be First Customers
• [News] NVIDIA Teams up with TSMC for Silicon Photonics Switches, Expected in 2025-26

(Photo credit: Intel)