[News] TSMC CoWoS Capacity Crunch Reportedly Pushes U.S. AI Chipmakers to Powertech Through 2027

AI is fueling a surge in demand for advanced packaging, and TSMC’s capacity in this segment is reportedly running tight. According to Economic Daily News, with most of TSMC’s advanced packaging capacity taken up by NVIDIA, several major U.S. AI chipmakers have rushed to seek help from Powertech, Taiwan’s second-largest OSAT provider.

To meet surging advanced packaging demand, the report notes that Powertech has developed technology rivaling TSMC’s CoWoS-L, winning large orders from multiple U.S. AI chip firms. Most of Powertech’s advanced packaging capacity for next year has already been snapped up, and its business in the segment is expected to remain strong through 2027. In response to rising demand, Powertech plans to boost capital spending to expand capacity. As the report highlights, the company aims to invest a record NT$40 billion in 2026, double this year’s level.

As highlighted by the report, tech giants such as OpenAI and Amazon are partnering with Broadcom and other ASIC makers to develop in-house AI chips, further intensifying demand for advanced process and packaging capacity.

Powertech’s PiFO Emerges as a Key Alternative to TSMC’s CoWoS-L

The report notes that Powertech’s PiFO advanced packaging technology—benchmarked against TSMC’s CoWoS-L—has emerged as the industry’s top alternative amid tight capacity at TSMC. Powertech refers to PiFO as a “Chip Middle” solution, which features redistribution layers (RDL) on both sides of the chip, interconnected by electroplated copper pillars linking the upper and lower RDL layers.

Powertech’s PiFO differs from TSMC’s CoWoS by adopting a square panel-level packaging design with a glass substrate, requiring chips to be diced and then arranged for packaging. In contrast, TSMC’s CoWoS mainly relies on a round silicon interposer. As noted by industry sources cited in the report, PiFO offers two key advantages over CoWoS-L — its glass substrate provides better heat dissipation, and its production cost is about 30% lower, making it an appealing option for customers.

Powertech’s Memory Ties Position It for Next-Gen AI Packaging

In addition, as noted by Economic Daily News, Powertech is the world’s leading memory packaging and testing provider, maintaining close partnerships with major memory manufacturers across DRAM, NAND Flash, and HBM packaging and testing. The report indicates, citing industry sources, that while most current advanced packaging solutions integrate HBM with CPUs and GPUs, future designs—driven by the shift of AI development toward edge devices—are expected to incorporate GDDR7 or even higher-spec DRAM. At that stage, close ties with memory makers will be crucial for packaging firms.

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(Photo credit: Powertech)