[News] Wafer-Level Packaging Showdown: TSMC Scales up CoWoS Reticle Size, as Intel Readies Foveros-S

Following its North America Technology Symposium, TSMC has shared fresh details on its CoWoS (Chip on Wafer on Substrate with silicon interposer) roadmap. According to Tom’s Hardware, Kevin Zhang, TSMC’s Senior Vice President and deputy COO, confirmed how companies like Cerebras and Tesla (with its Dojo chip) are aggressively pursuing wafer-level system integration.

To meet that demand, TSMC is expanding CoWoS capabilities to support larger interposers — moving from today’s 3.5X reticle size to 5X, 9X, and beyond, the report adds.

TSMC is indeed advancing its CoWoS technology to meet AI’s growing demand for logic and HBM. The foundry giant announced in its press release that by 2027, it aims to mass-produce 9.5 reticle size CoWoS, enabling packages with 12 or more HBM stacks alongside cutting-edge logic technology.

Following the System-on-Wafer (TSMC-SoW) in 2024, TSMC also introduced SoW-X, a CoWoS-based solution delivering 40X the computing power of current CoWoS, with volume production set for 2027.

In the Tom’s Hardware report, Kevin Zhang noted a clear trend toward larger interposers to pack in more compute units and HBM, with customers like Cerebras and Tesla increasingly eyeing wafer-level integration for future needs.

Chip Giants Clash on Advanced Packaging

However, it is worth noting that Intel, at its Foundry Direct Connect a couple of days ago, also disclosed plans to stepping up in advanced packaging to challenge TSMC.

According to Commercial Times, Intel is stepping up its game in advanced packaging by expanding capacity for Foveros Direct 3D — its hybrid bonding 3D stacking tech — at its New Mexico site. The chip giant reportedly plans to ramp up Foveros output by 30% and double its EMIB-T investment, pushing capacity to 150% of current levels.

Industry sources cited by the report observe that Intel’s Foveros-S is positioned to rival TSMC’s CoWoS-S, with future variants like Foveros-R and Foveros-B in the pipeline.

That may be why TSMC is reportedly shifting focus from CoWoS-S to CoWoS-L and CoWoS-R, as it aims to stay ahead in an intensifying packaging race, Commercial Times reports.

As per a previous Commercial Times report, TSMC’s major customer NVIDIA is showing signs of strong momentum lately, as its production schedule for its B300 series has reportedly been moved up to May, using TSMC’s 5nm process and CoWoS-L advanced packaging.

Read more

• [News] NVIDIA Reportedly Kicks off B300 Production Preparation in May, Boosting TSMC’s 5nm and CoWoS-L
• [News] Intel Ramps Up Foundry Race: 14A Risk Production in 2027; 18A Variants Drop in 2026 and 2028

(Photo credit: TSMC)