[News] TSMC Eyes Breakthroughs in SiC Thermal Management

Recent reports indicate that TSMC is spearheading an initiative with equipment makers and compound semiconductor partners to explore the use of 12-inch monocrystalline silicon carbide (SiC) for thermal substrates, aiming to replace conventional alumina, sapphire, or ceramic substrates.

Traditionally, SiC has been applied in power semiconductors, automotive, and energy storage. Now, the material is entering new application domains—such as AR smart glasses lenses and advanced 3D IC packaging—where it is being considered for use as a thermal dissipation material, particularly in thermal substrates.

For 3D IC packaging, two potential SiC adoption paths are emerging. The first is conductive SiC, prioritized for thermal substrate testing. The second, at a later stage, may involve semi-insulating SiC as part of the silicon interposer layer.

From a material perspective, SiC’s thermal conductivity ranks just below diamond. While ceramic substrates offer around 200–230 W/mK, SiC reaches 400 W/mK and can approach 500 W/mK. This makes it better suited than ceramics for handling the thermal demands of data centers and AI-intensive computing. However, diamond remains the ultimate thermal solution—but achieving 12-inch wafer-scale production is currently cost-prohibitive and technically immature.

SiC generally comes in two types: conductive (N-type), which is yellow-green and semi-transparent, and semi-insulating, which is nearly fully transparent. Industry sources note that 6-inch SiC wafers remain mainstream, with 8-inch poised for expansion. TSMC’s pursuit of 12-inch SiC for interposers could ease defect requirements compared to traditional SiC wafers, but slicing remains a critical challenge—poor cutting techniques can produce wave-like surfaces that render the material unsuitable for advanced packaging.

(Photo credit: TSMC)