[News] YMTC Reportedly Invests in SOI Micro, Backing an Alternative Chipmaking Approach Without EUV

China is actively exploring alternative approaches to chipmaking, with another domestic company gaining attention following new investment from the country’s leading NAND flash maker. According to South China Morning Post, Guangzhou-based SOI Micro is developing a low-power logic process aimed at reducing reliance on overseas technology. The company has recently attracted Changcun Industry Investment Fund, a venture capital fund backed by YMTC. For YMTC, the investment marks an expansion beyond the memory-chip supply chain into specialized logic manufacturing.

At the center of SOI Micro’s efforts is fully depleted silicon-on-insulator (FD-SOI) technology. As noted by EE Times China, FD-SOI does not require extreme ultraviolet (EUV) lithography equipment, helping sidestep some of the equipment constraints facing China’s chipmaking push.

FD-SOI Emerges as a Complementary Path to FinFET

FD-SOI is widely viewed as a complementary alternative to FinFET, a 3D transistor architecture designed to reduce power leakage, South China Morning Post highlights. TSMC uses FinFET from its 16nm family through 3nm, while Samsung Electronics offers FinFET processes spanning 14nm to 4nm.

According to EE Times China, FD-SOI offers key advantages at mature 22nm and 28nm nodes. Compared with FinFET, it has a simpler manufacturing flow and shorter development cycle, while its ultra-thin buried oxide structure reduces power leakage and unwanted electrical capacitance. The technology also provides greater flexibility in balancing performance and power consumption, making it well suited to smart vehicles, IoT, edge AI, and wearables.

Meanwhile, Anue notes that FinFET and FD-SOI are not entirely competing paths. The industry is exploring SOI-FinFET processes that combine SOI substrates with FinFET transistor structures, potentially capturing advantages from both. France’s CEA-Leti has also conducted FD-SOI pilot-line R&D at the 10nm and 7nm nodes, demonstrating room for the technology to advance further.

China Pushes to Build a Domestic FD-SOI Production Base

Despite China’s progress in FD-SOI substrate materials, EDA tools, and IP design, the country still lacks a domestic foundry with advanced FD-SOI capabilities, Anue notes. EE Times China adds that large-scale FD-SOI manufacturing remains concentrated among overseas players such as STMicroelectronics and GlobalFoundries. SOI Micro aims to fill this gap by establishing an independently controlled FD-SOI production line in Guangzhou.

The investment from Changcun Industry Investment Fund is expected to support this effort with wafer manufacturing expertise and supply-chain resources. The two sides plan to collaborate on domestic semiconductor equipment validation, locally produced silicon wafers, and further process development, with the goal of accelerating China’s first independently developed FD-SOI mass-production line, according to EE Times China.

Notably, South China Morning Post notes that SOI Micro has taken steps toward production. SDIC Venture Capital said the company had developed a process design kit (PDK) and was working with Wuhan-based foundry XMC on an FD-SOI production line. SOI Micro had reportedly targeted small-volume production in 2025 and secured orders from several chip-design firms.

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