[News] Nanya Tech Sees Memory Market to Reach Record US$800B in 2026, Nearly Half of Semiconductor Revenue
As the memory upcycle broadens from HBM and leading-edge DRAM to legacy products, Taiwanese DRAM maker Nanya Technology is emerging as a key beneficiary as AI-driven demand expands across the market. Citing Nanya Tech Senior Vice President Joseph Wu, Liberty Times reports that AI inference is expected to propel the global memory market value, including DRAM and NAND, to a record US$800 billion in 2026.
According to Wu, memory’s share of total semiconductor industry revenue could reach nearly 50% this year, significantly higher than the roughly 30% level seen historically.
According to Liberty Times, Wu said that as AI shifts from training to inference, demand for 3D-stacked memory — such as HBM — is expected to grow further over the next one to two years, with HBM projected to account for nearly 10% of total DRAM bit demand this year, while conventional server DRAM is expected to represent more than 40%.
Together, HBM and server DRAM already account for more than 50% of DRAM demand, and their combined share is expected to rise above 60% in the future, Wu noted.
Wu, per Next Apple, further highlighted the growing memory intensity of AI systems: For AI servers, a single GPU may require 96 high-density DRAM chips, while a single CPU platform could require more than 200 high-density DRAM chips as AI inference gains traction.
Nanya Tech Bets on Customized UWIO DRAM
However, Nanya Tech is not targeting the traditional HBM market. While HBM remains essential for AI training, Wu noted that the rise of AI inference is shifting the bottleneck toward memory bandwidth and power efficiency, as edge devices handle massive user interactions and KV cache workloads, Mirror Daily reports.
Due to its limited I/O capacity and higher power consumption, HBM is not an ideal fit for power- and latency-sensitive devices such as AI PCs, smartphones, and portable devices, Wu added.
To address this, Nanya is developing its customized UWIO DRAM, which leverages Wafer-on-Wafer (WoW) 3D IC stacking technology to directly integrate DRAM with CPUs or ASICs, Mirror Daily adds. The architecture reportedly delivers 5–10x higher bandwidth while reducing energy consumption per bit transferred to one-third to one-tenth that of HBM.
On the other hand, the company is accelerating its capacity expansion with a new wafer fab in Taishan, northern Taiwan, where total investment is expected to reach NT$500 billion (US$17 billion), according to Mirror Daily. The facility will reportedly introduce EUV lithography, with next year’s capital expenditure expected to surpass NT$200 billion. Set to start production ramp-up early next year, the new fab is expected to help Nanya narrow the technology gap with leading global memory makers, the report adds.
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(Photo credit: Nanya Technology)
