[News] Chinese Researchers Developed the World’s First Phase-Change Memristor-Based Neural Dynamical System Chip
A Chinese research team has developed the world’s first neural dynamical system chip based on phase-change memristors, dramatically accelerating complex brain modeling tasks while overcoming a decades-long computational bottleneck in real-time neural dynamics.
The chip was jointly developed by a team led by Yang Yuchao, professor at the School of Integrated Circuits at Peking University, and Song Zhitang, researcher at the Shanghai Institute of Microsystem and Information Technology (SIMIT), Chinese Academy of Sciences. Their findings were published in the journal Science on July 3.
According to Yang, enabling machines to model and understand the physical world in real time, much like the human brain, requires neural dynamical systems that combine neural networks with differential equations. Such systems can reconstruct smooth and accurate three-dimensional brain structures from incomplete and noisy data, offering broad potential in neuroscience and intelligent computing.
However, conventional computing architectures suffer from the long-standing “memory wall,” where memory and computation are physically separated. During differential equation solving, vast amounts of intermediate data must shuttle repeatedly between processors and memory, leading to high latency and power consumption.
To overcome this limitation, the researchers turned to the intrinsic physical properties of phase-change memory (PCM) devices. They exploited the predictable and precisely controllable conductance drift exhibited by phase-change memristors over specific time intervals.
Building on this characteristic, the team proposed a new controllable in-memory computing paradigm. The most time-consuming process in solving neural dynamical systems—adaptive time-step searching—was directly mapped onto the physical evolution of device conductance, allowing computation to be performed inside the memory cells themselves. In effect, operations that traditionally relied on complex digital circuits, repeated memory access, and extensive data movement are instead executed through the device’s inherent physical behavior.
The researchers also mapped neural network weights onto the multiple conductance states of phase-change memory, enabling matrix multiplication and accumulation operations to be executed within the same memory array. As a result, the chip integrates both key computational functions into a compute-in-memory array occupying just 0.28 mm².
Fabricated using a 40 nm process, the chip operates at 50 MHz and requires only a nine-stage pipeline to complete each integration step, achieving a single-iteration latency of 2.12 ms. The work represents the first hardware implementation of neural dynamical systems capable of millisecond-scale operation.
Performance evaluations showed substantial gains. Compared with the latest dedicated accelerators, the chip delivers 3.82× to 36.27× higher computational speed while reducing power consumption by 11.75× to 24.73×. In high-fidelity cerebral cortex reconstruction, it outperformed the NVIDIA A100 GPU by 50.38× to 478.18×, generating smooth, topologically consistent cortical meshes that accurately capture complex cortical folding while suppressing artifacts and self-intersection defects common to conventional methods.
The researchers believe the breakthrough could significantly expand the capabilities of brain-computer interfaces (BCIs) and neurological disease diagnosis. Looking ahead, the technology could enable real-time, personalized digital brain twins, providing hardware support for applications such as intraoperative neural navigation, early screening of Alzheimer’s disease, and individualized therapeutic interventions.
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