[News] NVIDIA Next-Gen Rosa CPU May Adopt TSMC A16 with Back-Side Power Delivery, Eyes 2028 Launch

NVIDIA is expanding its AI server platform strategy beyond GPUs to CPUs, with its next-generation Rosa CPU emerging as a key focus. According to Commercial Times, Rosa may use TSMC’s 2nm-class process and could even adopt the company’s A16 process featuring back-side power delivery. As noted by ICSmart, the Rosa CPU and Feynman GPU data center platform is scheduled to launch in 2028. The Rosa Feynman Spark platform for consumer PCs is planned to follow in 2030.

Rosa May Adopt TSMC’s A16 Process

As Commercial Times points out, TSMC’s A16 offers up to 1.10× higher chip density than N2P. Its biggest technological breakthrough is the introduction of Super Power Rail (SPR), a back-side power delivery technology that moves the power network to the back of the wafer. This improves power delivery efficiency, reduces IR drop, and frees up front-side routing space for signal interconnects. The report further notes that if Rosa ultimately adopts A16, it would extend the application of back-side power delivery beyond GPUs and ASICs to CPUs. Such a move could also have broader implications for the semiconductor supply chain.

Industry sources cited by Commercial Times say the number of CMP process steps at the 2nm node has already more than doubled compared with the 7nm. If back-side power delivery is adopted, CMP-related demand could increase by a further 15% to 20% compared with a conventional 2nm process. The technology is also expected to boost demand for carrier wafers, whose average selling prices (ASPs) are more than four times higher than those of reclaimed wafers.

Rosa CPU Specifications and Architecture

Beyond its potential A16 adoption, Rosa is also expected to introduce significant architectural enhancements. According to NVIDIA, Rosa CPU for agentic AI will feature its in-house Rigel cores based on the Arm v9.2 instruction set. Compared with the Olympus cores used in the Vera CPU, Rigel is designed to deliver higher single-core performance within the same die area. Key enhancements include improved instruction delivery, a larger L2 cache, and more efficient memory management.

ICSmart adds that although NVIDIA has not disclosed the exact core count or IPC improvements for the Rosa CPU, it is expected to feature 128 or more Rigel cores, with IPC performance potentially improving by more than 50%.

Meanwhile, NVIDIA has begun securing early customers for its Vera CPU platform. According to Reuters, AI startup Perplexity recently confirmed it plans to use NVIDIA’s Vera CPUs, although it declined to disclose how many it plans to purchase. NVIDIA has also disclosed that OpenAI, Anthropic, and Oracle plan to use its Vera CPUs. Economic Daily News adds that NVIDIA’s GPUs and CPUs both rely heavily on TSMC. Industry observers expect that expanding adoption of the Vera CPU will increase NVIDIA’s wafer orders with TSMC, further supporting demand for its advanced process capacity.

Read more

• [News] NVIDIA Reportedly Opens Vera CPU Sales to China as Early as August as H200 Shipments Stall
• [News] NVIDIA Enters PC Market with RTX Spark Featuring MediaTek-Co-Designed N1X CPU on TSMC 3nm

(Photo credit: NVIDIA)