[News] Intel Reportedly Presents First Thick-Core Glass Substrate with EMIB, Targeting AI Data Centers

Intel has reportedly made fresh progress in glass substrate technology, indicating that the company has not exited the space despite market speculation. According to Wccftech, Intel Foundry displayed a “Thick Core” glass substrate integrated with its EMIB packaging technology at this year’s NEPCON Japan, with the solution said to be aimed at data center applications.

The combination of EMIB and glass substrates is seen as critical to scaling AI architecture performance, as glass enables finer interconnects, improved depth-of-field control, and lower mechanical stress, Wccftech indicates.

Inside Intel’s Thick-Core Glass Substrate with EMIB

From a technical standpoint, TechPowerUp notes that Intel has developed a thick-core glass substrate measuring 78 × 77 mm for the overall package. The substrate supports roughly twice the silicon reticle size, translating to about 1,716 mm² of silicon area (2 × 858 mm²) for logic and memory, and is described as the first 10-2-10 thick glass-core substrate to incorporate Intel’s EMIB multi-chip module technology.

The configuration includes 10 build-up redistribution layers (RDLs) on the top side of the substrate to fan out signals from the die, enabling fine-pitch routing, TechPowerUp notes. The glass core itself consists of two layers, built using 800-µm (0.8-mm) class material. On the bottom (back) side, the substrate also incorporates 10 build-up layers that help organize and fan out dense wiring from the silicon die, making the package easier to interface with standard motherboards or PCBs.

TechPowerUp further points out that Intel embeds two EMIB bridges within the glass core, enabling multi-chip module packaging by interconnecting multiple smaller dies via the EMIB bridges.

In addition, TechPowerUp highlights that Intel says it did not encounter any SeWaRe issues during testing, a term referring to micro-cracking in glass substrates during manufacturing. Because glass is brittle, such defects can arise at various production stages, with microcracks often appearing during substrate dicing. Wccftech adds that the absence of SeWaRe helps position this solution for server-grade applications, including AI chips.

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(Photo credit: Intel)