[News] EMIB Challenges Test Intel amid Buzz of NVIDIA Considering 14A/18A and Advanced Packaging

As NVIDIA CEO Jensen Huang arrived in Taipei today and reportedly reaffirmed cooperation with Intel on x86 CPU development, market attention has refocused on how Team Green will navigate the rising wave of dual-foundry strategies. The renewed interest comes as reports suggest major tech players, including NVIDIA and Apple, are evaluating Intel’s 14A and 18A nodes, along with its advanced packaging capabilities.

According to Wccftech, big tech firms such as NVIDIA are considering outsourcing less complex, lower-risk chips to Intel—such as Feynman’s I/O die on 14A or 18A—to protect volume ramp-up in case Intel falls short on yield or capacity, while keeping GPU core production anchored at TSMC. The strategy underscores NVIDIA’s continued dependence on TSMC’s leading-edge nodes: South Korea’s EBN reported in late 2025 that NVIDIA was the only customer for TSMC’s A16 process, with joint testing already in progress.

Wccftech adds that NVIDIA may also be exploring outsourcing other non-core products to Intel, potentially bringing next-generation gaming GPUs into a foundry deal with Team Blue.

On the other hand, Tom’s Hardware reports that Apple is also evaluating Intel’s 18A (18A-P) and 14A, though questions remain over whether Intel can provide sufficient advanced capacity for external customers by 2028.

The report highlights Apple’s base M-series chips—used in cost-sensitive Macs and tablets—as prime candidates. With smaller die sizes, cheaper packaging, and greater tolerance for yield and performance variation, these chips are well suited for U.S.-based production targeting the domestic market.

Packaging Feynman? EMIB Hurdles

While market chatter suggests NVIDIA is considering Intel’s EMIB (Embedded Multi-die Interconnect Bridge) to package Feynman, Tom’s Hardware highlights significant technical hurdles. Feynman chips are expected to draw 5–6 kW—far beyond what traditional board-level voltage regulation can handle, the report explains, adding that to manage these extreme currents, the processors will rely on integrated voltage regulators (IVR) built directly into advanced packaging, such as CoWoS-L interposers.

According to the report, IVR allows power to enter the package at a higher voltage (~1.8V), reducing current per bump, improving efficiency, cutting voltage ripple, and enabling 10–100× faster response than on-board VRMs.

However, Tom’s Hardware cautions that while Intel’s EMIB can accommodate co-packaged IVR components, it is not true embedded IVR and lacks the capability to support 5–6 kW AI accelerators. The report adds that although Intel’s Foveros technologies—such as Foveros Omni and Direct3D—can deliver multi-kilowatt power with low IR drop by stacking dedicated power tiles with logic, adopting this approach would likely force NVIDIA to redesign the GPU compared with a TSMC CoWoS-L version.

As a result, while packaging Feynman in the U.S. may sound appealing, the report says NVIDIA is more likely to wait for TSMC to roll out advanced packaging in the U.S. later this decade, given the hurdles EMIB and Foveros face with high-end GPUs and the impracticality of redesigning large chips. That said, Intel could still land packaging work for Vera CPUs or offer custom Xeon processors to NVIDIA sooner, leveraging its recent $5 billion investment from the company, as per Tom’s Hardware.

Amid a rising wave of dual-foundry strategies, many U.S. fabless firms—including AMD and Qualcomm—are reportedly pairing Samsung and TSMC to reduce risk. For Intel, this trend presents both opportunity and challenge. While NVIDIA may lean on TSMC for high-end GPU cores, Intel must overcome technical and capacity hurdles to win significant foundry business in a market increasingly hedging against reliance on a single supplier.

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(Photo credit: Lip-Bu Tan’s X)