Samsung’s flagship mobile processor, the Exynos 2400, produced using the 4LPP+ process technology, currently boasts a yield rate of approximately 60%, as per sources cited by TechNews. While this figure falls short of competitors, notably TSMC’s N4P process technology with yields surpassing 70%, it represents a significant improvement from Samsung’s own 25% yield rate over a year ago.

Samsung’s Exynos 2400 flagship mobile processor is the company’s first to utilize Fan-Out Wafer-Level Packaging (FOWLP). Samsung claims that FOWLP technology enhances heat resistance by 23% and boosts multicore performance by 8%. Consequently, the Exynos 2400 mobile processor delivers commendable performance in the latest 3DMark Wild Life benchmark tests.

In fact, Samsung previously announced plans to commence mass production of the SF3 chip in the second half of 2024, followed by the introduction of its 2-nanometer process technology between 2025 and 2026.

Industry sources cited in the report also indicate that Samsung’s foundry business has begun trial production for its second-generation 3-nanometer process technology, SF3. Furthermore, the company aims to increase its yield rate to over 60% within the next six months.

It is noteworthy that Samsung’s 3nm technology is highly aggressive compared to TSMC’s approach, which will transition to GAA transistors with its 2nm process. Samsung’s first-generation 3nm process already incorporates GAA transistor technology, specifically the MBCFET (Multi-Bridge Channel Field-Effect Transistor), known as SF3E, or 3GAE technology.

As per WeChat account ic211ic cited sources in the report, Samsung’s 3nm GAA technology utilizes wider nanosheets compared to the narrow nanowire GAA technology, offering higher performance and energy efficiency. With the 3nm GAA technology, Samsung can adjust the channel width of nanosheet transistors to optimize power consumption and performance, meeting diverse customer requirements.

Additionally, the flexibility of GAA design is highly advantageous for Design-Technology Co-Optimization (DTCO), contributing to achieving better Power, Performance, and Area (PPA) advantages.

In comparison to Samsung’s 5nm process, the first-generation 3nm process reduces power consumption by 45%, enhances performance by 23%, and decreases chip area by 16%. The upcoming second-generation 3nm process is expected to further reduce power consumption by 50%, boost performance by 30%, and reduce chip area by 35%.

(Photo credit: Samsung)

According to industry sources cited by South Korean media The Chosun Daily, Samsung has commenced the production of prototypes for its second-generation 3nm process and is testing the chip’s performance and reliability. The goal is to achieve a yield rate of over 60% within the next six months.

TSMC and Samsung are both actively vying for customers. Samsung is preparing to commence mass production of the second-generation 3nm GAA architecture in the first half of the year. The key to success in the competition lies in whether Samsung can meet the demands of major clients such as Nvidia, Qualcomm, AMD, and simultaneously achieve a rapid increase in production.

Samsung is currently testing the performance and reliability of prototypes for the second-generation 3nm process, with the initial product set to feature in the soon-to-be-released Galaxy Watch 7 application processor (AP). It is expected to be used in the Galaxy S25 series Exynos 2500 chip next year.

If the production yield and performance of the second-generation 3nm process are stable, there is a chance that customers who had previously switched to TSMC may return to Samsung, especially considering Qualcomm’s movements.

As per report, Qualcomm is collaborating with TSMC in the production of the next-generation Snapdragon 8 Gen 3. Additionally, Nvidia’s H200, B100, and AMD’s MI300X are expected to adopt TSMC’s 3nm process.

Samsung announced in November of last year that it would commence mass production of the second-generation 3nm process in the latter half of 2024. While Samsung has not responded to Chosun’s report regarding the production of prototypes for the second-generation 3nm process, the timeline seems plausible.

However, the report mentions a chip yield rate of 60% without specifying transistor count, chip size, performance, power consumption, or other specifications.

Furthermore, according to Tom’s Hardware’s report, the chip size, performance, and power consumption targets for processors used in smartwatches, mobile phones, and data centers are entirely different. A 60% yield rate for small chips would make commercial use challenging, but for chips with a reticle size of 60% yield rate, it would be reasonably acceptable.

However, caution is advised in interpreting this report due to the uncertainties surrounding Samsung’s second-generation 3nm process production targets at its semiconductor foundries.

Nonetheless, the commencement of the second-generation 3nm process production is a significant development for both Samsung and the semiconductor industry as a whole.

(Image: TSMC)

With its 3nm manufacturing process in mass production for approximately a year, TSMC is expected to have a breakthrough in customer acquisition and capacity utilization in 2024.

According to predictions from a South Korean outlet The Elec, aside from Apple, customers such as NVIDIA, AMD, Qualcomm, and MediaTek are expected to place orders for the second generation of the 3nm process within the year. This is anticipated to significantly boost TSMC’s 3nm process capacity utilization to 80% by the end of the year.

Chinese tech media ICsmart further quoted from the report, stating that although TSMC announced the mass production of its 3nm process in December 2022, the first-generation 3nm process (N3B) had only one customer throughout 2023, which was Apple. Companies like MediaTek and Qualcomm opted for the 4nm process due to cost considerations.

However, the report suggests that in 2024, more companies, in addition to Apple, are expected to place orders for the more cost-effective second generation of the 3nm process (N3E). This is anticipated to boost TSMC’s overall production capacity for the 3nm process.

Several chip companies are expected to adopt the N3E process for their new products. The report suggests that TSMC’s customers for this process may include Qualcomm, which is gearing up to launch the new Snapdragon 8 Gen 4, MediaTek with its next-generation Dimensity 9400, Apple with its M3 Ultra chip and A18 Pro processor, AMD with the Zen 5 CPU and RDNA 4 GPU, and NVIDIA with the Blackwell architecture GPU. Notably, the Apple M3 Ultra chip might make its debut in the upgraded Mac Studio around mid-year.

The report notes that TSMC initially anticipated steady growth for the 3nm process in early 2023 as yields improved, but with only Apple as a customer, the “steady growth” of the 3nm process negatively impacted TSMC’s performance.

The report suggests that with TSMC’s new orders from customers beyond Apple for the 3nm process, a considerable rebound is expected. Monthly production is projected to reach 100,000 wafers by 2024, and the 3nm production capacity utilization rate is poised to soar to 80% by the end of 2024.

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(Photo credit: TSMC)

TSMC, the world’s leading foundry in the 3nm technology, is reportedly experiencing a surge in the number of New Tape-Outs (NTOs) for the 3nm family in 2024, with Clients such as MediaTek, AMD, NVIDIA, Qualcomm, and Intel.

Among the 3nm family, the N3P process, set for mass production in the second half of 2024, is also making significant progress. Rumors suggest that Tesla has been added to the list of customers, with plans to utilize the N3P for the production of next-generation Full Self-Driving (FSD) chips after its launch.

Currently, Tesla has placed orders with TSMC for numerous chips related to electric vehicles. For instance, the supercomputer chip “D1” is utilizing TSMC’s 7nm technology along with advanced packaging processes.

Reportedly, according to industry sources, Tesla’s older FSD chips were initially produced using Samsung’s 14nm process, later upgraded to Samsung’s 7nm process. Subsequently, considering design upgrades, production quality, and scale, Tesla has shifted its HW 4.0 autonomous driving chip production to TSMC, utilizing the 5nm technology family.

The latest information per the report indicates that Tesla has recently initiated a NTO process with TSMC, planning to utilize the N3P for the production of the fifth generation of self-driving vehicle chips. Market expectations are high, with the influx of relevant orders suggesting that Tesla has the potential to become one of TSMC’s major clients.

According to TSMC’s previously disclosed process roadmap, the N3P process is an advanced version within the 3nm family, scheduled for production in 2024. Compared to the N3E, the N3P boasts a 5% improvement in performance, a 5% to 10% reduction in power consumption, and a 1.04 times increase in chip density.

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• [News] Intel’s Next Gen CPU to Produce at TSMC with 3nm in First Half of Next Year

(Photo credit: TSMC)

Market speculations rumored that TSMC might cut its capital expenditure for next year to USD 28-30 billion. This potential reduction, ranging from 6.3% to 12.5% compared to this year, is attributed to the shared use of certain process equipment and the utilization of deferred budgets from the current year. If realized, this would mark the lowest capital expenditure point in nearly four years. Additionally, it could impact the order volumes for equipment & testing-related companies, influencing the overall order dynamics in the supply chain for the upcoming year, reported by UDN News.

Responding to the speculations about a decrease in next year’s capital expenditure, TSMC stated on the December 4th that regarding next year’s capital expenditure will be officially disclosed during the January 2024 conference. Despite the potential moderation in capital expenditure, industry observers anticipate continued growth in R&D investment, particularly in advanced process technology.

Industry sources suggest that TSMC’s R&D investment in advanced process technology will persist in its growth trajectory for the next year. Notably, approximately 80% of the equipment for the 3nm advanced process can be shared with the 5nm and 7nm processes. The focus of next year’s capital expenditure is expected to be on investments in the 3nm and below advanced processes and mask technology.

Meanwhile, mature processes will bring a rise in the share of specialty processes and equipment modifications for advanced packaging.

During 2023Q3 earnings call in October, TSMC set a cautious tone, citing uncertainties in the short-term market. The company maintained this year’s capital expenditure at nearly USD 32 billion, adopting a prudent approach to investment.

On the other hand, ASML, the global leader in semiconductor lithography technology, recently released its financial report. The forecast indicates that 2024 will be a transitional year, with expected revenue similar to that of 2023. This cautious outlook aligns with the semiconductor industry’s current phase of experiencing the bottom of the cycle.

(Image: TSMC)