The AI boom is extending beyond high-performance computing (HPC) into physical AI, opening new opportunities for memory makers beyond HBM, particularly in humanoid robotics. According to The Elec, Micron Vice President Lee Cheol revealed at SEDEX 2026 in South Korea that the company is developing ed...

The rise of agentic AI is reshaping CPU design priorities. According to Wccftech, which interviewed NVIDIA's Vera team, the company has chosen a monolithic compute die for its Vera CPU over the chiplet architectures used by major x86 competitors. Vera also features a custom LPDDR5X memory subsystem ...

Taiwan's ASIC design industry is seeing growing opportunities, with MediaTek emerging as a key player in the expanding market. However, according to Commercial Times, citing institutional investors, Google's TPU v9 project, involving MediaTek, could see its tape-out delayed until January 2027 follow...

As previously reported by ZDNet in September, Samsung is pursuing a dual-track strategy for custom HBM, tapping both its own foundry and rival TSMC for base die production. A new report from Seoul Economic Daily lends further weight to this strategy, revealing that NVIDIA has asked Samsung, SK hynix...

Huawei’s  Tau (τ) Scaling Law faces its greatest challenge in electronic design automation (EDA) tools, according to Huang Yu, chief scientist for semiconductor EDA at Huawei, speaking at the 2026 Bay Area Chip Expo on October 15, media reports said. Huang outlined four layers of Tau (τ) Sc...