[News] TSMC Reportedly Eyes 20% CoWoS Price Hike, Skips Equipment Price Renegotiations Amid AI Demand Surge

As increasingly large AI accelerators strain advanced packaging capacity, TSMC’s CoWoS supply remains tight. According to supply chain sources cited by Commercial Times, the foundry giant is reportedly weighing price hikes of up to 20%, with some packaging lead times already stretching.

The pricing pressure comes as advanced packaging demand expands beyond AI GPUs to server CPUs and custom ASICs, adding to a growing backlog of unfilled orders. Against this backdrop, Commercial Times reports that foundries and outsourced semiconductor assembly and test (OSAT) providers are considering another round of CoWoS price increases of 10%–20%.

Adding to the capacity squeeze, longer AI chip testing times are emerging as another bottleneck. Commercial Times notes that extended testing cycles are further straining packaging and testing capacity. Underscoring the challenge, Seoul Economic Daily, citing Nomura Securities, reports that NVIDIA Blackwell’s final testing takes an estimated four times as long as Hopper’s, while Rubin could require seven times as long.

The capacity crunch is also rippling through the equipment supply chain. According to Commercial Times, equipment lead times have lengthened to six to eight months, up from three to six months, as customers prioritize securing deliveries over negotiating prices.

Even TSMC appears to be shifting its procurement approach amid the equipment supply squeeze. According to Commercial Times, the foundry giant, which typically negotiates price cuts or additional features at no extra cost, reportedly placed equipment orders at existing prices this year without seeking discounts or upgrades.

Notably, TSMC is not only seeking price increase for CoWoS. According to Liberty Times, the company has finalized plans to raise wafer-out prices by 3%–6% starting January 2027, depending on the process node, with advanced nodes such as 2nm and 3nm seeing the steepest increases.

TSMC’s CoWoS Expansion in Focus

Amid high demand for CoWoS, TSMC continues to expand its advanced packaging capacity, with analysts cited by Commercial Times estimating monthly CoWoS capacity will exceed 130,000 wafers in 2026 and target 200,000 in 2027.

Goldman Sachs, meanwhile, projects TSMC’s CoWoS capacity to reach 1.275 million wafers in 2026, or roughly 106,000 per month, before surging 114% YoY to 2.73 million in 2027 (227,500 monthly). Capacity is then expected to climb another 27% to 3.48 million wafers in 2028, equivalent to nearly 290,000 per month, Goldman Sachs adds.

Beyond capacity expansion, TSMC is also pushing the boundaries of advanced packaging to accommodate increasingly large AI chips. At its latest earnings call, Chairman and CEO C.C. Wei highlighted strong yields for its 5x reticle-size packaging, already in mass production, while confirming development of 9x and 14x solutions. The company is also advancing CoPoS to support larger packages at lower costs, with Commercial Times pointing to a 2028 timeline for 14x packaging.

Read more

• [News] TSMC Reportedly Targets 22% 2nm, 16%+ 3nm Capacity Boost by Mid-2027; CoWoS to Double by 2028
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(Photo credit: TSMC)