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[News] NVIDIA’s Memory Shake-Up: Rubin Ultra Rethinks 12-Hi HBM4E for 8-Hi HBM4, Rubin GPU Bandwidth Cut 13%


2026-10-27 Semiconductors editor

As a major HBM customer, NVIDIA is stirring fresh debate with two reported shifts in its memory strategy. According to ZDNet, Samsung and SK hynix are preparing to ship 8-Hi HBM4 for Rubin Ultra in 2Q27, marking a departure from the original 12-Hi HBM4E plan. Separately, Wccftech reports that NVIDIA quietly trimmed Vera Rubin’s HBM4 bandwidth specifications, by roughly 13% per Rubin GPU and by up to 26% for HGX Rubin NVL8 systems, with changes dating back to September.

8-Hi HBM4 Poised to Gain Ground from Mid-2027

According to ZDNet, 8-Hi HBM4 was initially absent from NVIDIA’s plans, but talks gained traction in 3Q26 as the company reconsidered its memory configuration for Rubin Ultra. Originally expected to rely on 12-Hi HBM4E, the next-generation AI accelerator could instead adopt a mix of 8-Hi HBM4 and HBM4E, potentially easing supply constraints linked to thermal challenges and lower yields in 12-Hi stacks, the report adds.

ZDNet adds that although both Samsung and SK hynix have completed NVIDIA’s qualification for 12-Hi HBM4, their 8-Hi products will require separate certification. A source familiar with the matter told ZDNet NVIDIA is expected to deploy both 8-Hi HBM4 and 8-Hi HBM4E in Rubin Ultra-based NVL rack-scale systems, depending on rack configuration.

According to TrendForce, compared to earlier plans for 12-Hi HBM modules, 8-Hi configurations use fewer DRAM dies, lowering both the cost per stack and the overall GPU bill of materials. These configurations also enable the same HBM bit output to support more GPUs. Given the ongoing tight HBM supply, 8-Hi setups are expected to be a priority for evaluation by many GPU and ASIC vendors in 2027, TrendForce says.

While 12-Hi HBM4 remains the mainstream configuration in 2026, its 8-Hi counterpart is expected to see a sharp rise in adoption from mid-2027, ZDNet reports. The shift could also gain momentum beyond NVIDIA. Economy Tribune, citing Daishin Securities, suggests Anthropic’s in-house AI chip could also feature 8-Hi HBM4, raising the prospect of Samsung supplying both foundry services and memory for the project.

Lower HBM4 Bar for Rubin May Ease Memory Supply

On the other hand, NVIDIA’s Vera Rubin AI platform has undergone an under-the-radar specification overhaul, trading lower HBM4 memory and sixth-generation NVLink bandwidth for greater scale-out networking capacity.

An archived September 1 version of NVIDIA’s official specifications listed the Vera Rubin NVL72 system with 20.7 TB of HBM4 capacity and 1,580 TB/s of bandwidth, according to Wccftech. The Vera Rubin Superchip was rated at 576 GB and 44 TB/s, while each Rubin GPU offered 288 GB and 22 TB/s, Wccftech notes.

Since then, NVIDIA has lowered per-GPU HBM4 bandwidth to 19.2 TB/s and NVLink 6 throughput from the originally advertised 3.6 TB/s to 3 TB/s—cuts of roughly 13% and 17%, respectively, Wccftech adds. In addition, according to IT Home NVIDIA has revised the memory specification for Vera CPUs from a fixed 1.5 TB of LPDDR5X per chip to “up to 1.5 TB.”

Notably, Economy Tribune highlights that the top three memory makers have all revealed their HBM4 data: Samsung and SK hynix have disclosed HBM4 data transfer rates of 11.7 Gbps per pin, with Samsung citing a maximum of 13 Gbps, while Micron reports speeds exceeding 11 Gbps. These translate to approximately 3.0 TB/s per HBM4 stack for Samsung and SK hynix, and more than 2.8 TB/s for Micron, the report explains.

As each NVIDIA Rubin GPU integrates eight 36 GB HBM4 stacks, achieving the originally advertised 22 TB/s bandwidth would require roughly 10.7 Gbps per pin, compared with about 9.4 Gbps for the revised 19.2 TB/s specification, Economy Tribune reports, adding that in theory, the memory makers’ disclosed performance figures are sufficient to meet NVIDIA’s original target.

IT Home notes that lowering the bandwidth requirements could allow more HBM4 products to qualify for Rubin GPUs, potentially boosting overall production output.

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(Photo credit: NVIDIA)

Please note that this article cites information from ZDNet, Wccftech, Economy Tribune, IT Home.



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