[News] CXMT Accelerates 4F² DRAM Push, Eyes Year-End Server DDR5 RDIMM Launch
Following its September announcements of mass production for its fifth-generation DRAM platform (G5) and LPDDR6, Chinese memory maker CXMT has unveiled another technology advance. According to Yicai Global, CXMT President Cao Kanyu introduced the company’s 4F² DRAM architecture at the October 10 Integrated Circuits and Chiplet Conference, with plans to launch next-generation DDR5 RDIMMs based on the technology by year-end.
As explained by MyDrivers, while the industry currently relies on 6F² designs, in which each memory cell occupies six times the square of the minimum feature size, 4F² reduces that footprint to four times, potentially boosting memory density by 30%–50% within the same area. Central to CXMT’s approach is a Vertical Surrounded Gate (VSG) transistor, which improves electrostatic control while reducing leakage current and short-channel effects, according to Yicai.
Beyond transistor scaling, the shift toward three-dimensional 4F² designs could help overcome conventional DRAM manufacturing bottlenecks. Key approaches include separating memory cell-array fabrication from peripheral CMOS processing and using wafer-level hybrid bonding for high-speed interconnections, Yicai reports.
Cao, cited by the report, said CXMT has more than 300 published patent families related to 4F² architecture, which he described as an industry-leading portfolio.
CXMT’s growing market presence adds weight to its ambitions. According to TrendForce, the company ranked fourth in global DRAM revenue in 2Q26, with its market share climbing to 9.5% from 7.6% in the previous quarter, trailing Samsung (39.4%), SK hynix (24.9%) and Micron (23.3%).
CXMT’s Aggressive 4F² Timeline Puts Rivals on Notice
Meanwhile, Samsung is taking a more measured approach to next-generation DRAM. According to Economy Tribune, the company unveiled a 16Gb prototype combining 4F² cells and wafer-to-wafer hybrid bonding at ISSCC 2026, but is reportedly prioritizing hybrid bonding for commercialization. The technology is not expected to reach the market before 2028, with no firm timeline for 4F² integration, the report adds.
Against this backdrop, CXMT’s year-end launch target appears particularly ambitious, though commercial availability does not necessarily signal readiness for high-volume production. Meanwhile, Wccftech reports that Samsung is eyeing 4F² adoption for its B1b process, reportedly renamed D0a, while SK hynix is also advancing vertical-gate (VG) 4F² DRAM, according to Economy Tribune.
CXMT’s Server DRAM Leap Comes with Challenges
Beyond the technology milestone, CXMT’s 4F² push also signals a deeper move into server memory, a market long dominated by global suppliers. As Yicai notes, the company has traditionally focused on consumer electronics, while server DRAM demands greater reliability and stability to support round-the-clock operations.
As Economy Tribune notes, Samsung and SK hynix are already well established in server DDR5. SK hynix, which pioneered DDR5 commercialization in 2020, became the first to validate a 256GB DDR5 RDIMM built with 32Gb DRAM chips for Intel’s Xeon 6 platform in December 2025, the report notes. Samsung, meanwhile, is also mass-producing server-grade DDR5 RDIMMs, including 128GB DDR5-6400 modules, per Economy Tribune.
Still, an ambitious launch timeline for CXMT does not necessarily translate into a technological lead. According to Money Today, the Chinese DRAM maker’s upcoming products may only partially adopt 4F² technology, while achieving high-volume production remains a separate hurdle.
Read more
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(Photo credit: CXMT)
