[News] SK hynix Unveils H-TPU SSD Processor That Slashes Power Consumption, Eyes HBF Applications

As AI workloads place growing demands on storage systems, conventional SSD controllers face increasing pressure to deliver higher performance without excessive power consumption. According to ZDNet, SK hynix has unveiled its ultra-lightweight Hynix Transaction Processing Unit (H-TPU) architecture, designed to distribute storage-control tasks across specialized processors and improve efficiency.

SK hynix Vice President Koo In-jae, who oversees SoC design, noted that while GPU performance and PCIe bandwidth have doubled with each generation, general-purpose CPUs in SSD controllers have struggled to keep pace in operating frequency and control capabilities. Traditional CPU architectures are becoming less efficient at handling the roughly 100 functions involved in storage control. Adding more CPU cores to improve performance also increases power consumption and introduces unpredictable pipeline latency, Koo explained.

To address these limitations, SK hynix has developed H-TPU, an ultra-lightweight programmable processor dedicated to transaction processing. Unlike tensor accelerators used for AI computation, H-TPU handles SSD data-plane control and transactions. Rather than relying on a single large CPU, the architecture distributes storage-control tasks across dozens of compact H-TPU clusters, according to the report.

By eliminating complex CPU features such as superscalar and out-of-order execution and adopting a simplified four-stage pipeline, H-TPU reduces processor area to approximately 4% and power consumption to around 2.5% of those of a conventional CPU core, according to Koo. It also activates only the modules required for each operation, keeping unused modules in a low-power state to further improve efficiency, the report highlights.

Looking ahead, SK hynix expects its H-TPU-based controller architecture to complement high-bandwidth flash (HBF), an emerging memory technology designed for AI workloads, as the report highlights.

SSD Controller Advances Target Higher Efficiency for AI Workloads

AI inference is highly read-intensive, often following write-once-read-many (WORM) access patterns, with read-to-write ratios reaching approximately 300,000 to 1. Koo explained that AI compilers and runtimes could inform the HBF SoC of upcoming data-processing needs, allowing the controller to manage buffers and prefetch data in advance. By allowing NAND data access and computation to proceed in parallel, this approach could reduce data access delays and improve AI processing efficiency, the report notes.

Building on H-TPU, SK hynix plans to introduce hardware automation (HWA), which assigns repetitive storage-control tasks, including instruction processing, data address lookups, and temporary buffer copying, to dedicated hardware circuits, according to ZDNet.

Meanwhile, Samsung is also advancing SSD controller technology for AI infrastructure. According to Yonhap News, the company began mass production of its PCIe 6.0-based PM1763 enterprise SSD in July 2026, featuring a newly developed 4nm controller and ninth-generation V-NAND. Samsung says the drive delivers more than twice the performance and over 1.8 times the power efficiency of its predecessor.

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(Photo credit: SK hynix)