[News] Ex-HiSilicon Chip Chief’s Startup Reportedly Raises $100M, Targets Ultra-Large AI Models on a Single Chip
As Huawei draws attention with its new Kirin 9050 Pro featuring LogicFolding, a startup founded by one of its former chip executives is also stepping into the spotlight. According to ijiwei, Jiuwanli Future Technology, founded by former HiSilicon Kunpeng chief and Horizon Robotics chip executive Peng Chen, has raised more than $100 million (RMB 677 million) across back-to-back seed and angel rounds.
Behind the startup is a veteran of Huawei’s chip push. Chen spent nearly two decades at HiSilicon, overseeing the development of Kunpeng and Ascend processors and leading teams of more than 1,000 engineers, ijiwei notes.
Notably, his track record reportedly includes work on what the company describes as the industry’s first TSMC CoWoS-packaged chip and first ARM64 server chip, as well as an in-house ARM CPU core competitive with Arm’s own designs. Ijiwei suggests Chen also led the development and mass production of a series of AI training and inference chips within two years.
Chinese media outlet Zhidx also highlights Chen’s high-profile resume, noting that during his time at Horizon Robotics, he built the company’s Journey 6 series product line. According to Horizon Robotics’ data cited by the report, the Journey 6 lineup spans 10 to 560 TOPS, covering a broad range of computing requirements.
Chen’s track record has also helped draw heavyweight backing. Zhidx reports that investors include HongShan (formerly Sequoia China), Lenovo Capital and Incubator Group (LCIG), and Walden Hi-Tech, a local RMB-fund affiliate of Walden International, among others.
Targeting Ultra-Large AI Models on a Single Chip
Jiuwanli is setting its sights on an area where China’s AI chipmakers have had relatively limited exposure. Founded on May 7, 2026, the startup is developing high-performance inference chips for edge and on-device AI, according to ijiwei. Its goal is to run ultra-large-parameter models efficiently on a single chip, combining high compute, energy efficiency and low latency to support long-horizon tasks and next-generation agentic AI.
That approach could address a key bottleneck in bringing agentic AI to edge devices. Zhidx notes that edge AI chips have largely been limited to small- and mid-sized models, while running larger models can introduce network latency, privacy and cost challenges.
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