Soaring AI-server memory demand is driving DRAM prices sharply higher—and now PC and notebook makers are feeling the squeeze. Industry sources revealed today that Lenovo has begun notifying clients of coming price hikes, with adjustments set to take effect in early 2026 as market pressures mount.

According to the sources, Dell, another tech giant, isn’t staying quiet either, as the company has issued its own price-hike alert to customers. Industry sources say Dell is expected to raise prices by at least 15-20%, with the increase potentially taking effect as soon as mid-December.

As reported by Bloomberg in late November, Dell COO Jeff Clarke warned that he’s “never seen memory-chip costs rise this fast,” noting that expenses are climbing across every product line.

Memory Price Surge Hits PCs, Lenovo, HP, Dell Brace for Impact

A notice obtained by industry sources shows Lenovo warning customers that all current quotations and prices will expire on January 1, 2026, citing two key factors: an intensifying memory shortage and the rapid integration of AI technologies.

According to Lenovo, on one front, global supply chain strains are sending memory costs soaring, rippling through to overall hardware pricing. At the same time, enterprises racing to deploy AI applications are fueling unprecedented demand for high-performance systems—further tightening supply and pushing prices upward. Thus, the company recommends placing orders as soon as possible to secure purchases at current prices and avoid additional costs resulting from price adjustments.

Chosun Biz reports that PC makers are under mounting profit pressure as key DRAM components—including DDR5—have jumped 70% YoY, with some parts spiking up to 170%. Global leaders like Lenovo, HP, and Dell, along with Samsung Electronics and LG Electronics, are now reportedly rethinking their 2026 product roadmaps, including AI PCs and tablets, the report adds.

As per the Asia Business Daily, HP CEO Enrique Lores warned that H2 2026 could be especially tough, and prices may rise if needed. He reportedly noted that memory chips make up roughly 15–18% of a typical PC’s cost.

TrendForce’s latest report states that rising memory prices have significantly increased BOM costs in consumer electronics, prompting brands to raise retail prices and dampening market demand. As a result, TrendForce has downgraded its 2026 notebook shipment forecast from an initial 1.7% YoY growth to a 2.4% YoY decline.

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• [News] SanDisk, Samsung Reportedly Delay NAND Delivery, Hitting Transcend with 50–100% Price Spike

(Photo credit: Lenovo)

The U.S. is moving to tighten its grip on AI-related technologies, with lawmakers pushing to block China’s access to advanced American AI capabilities. According to Financial Times, a newly introduced bipartisan bill would bar NVIDIA from supplying China with its high-end H200 and Blackwell processors.

The measure, called the Secure and Feasible Exports (SAFE) Chips Act, would mandate that the Commerce Department halt export licenses for chip sales to adversaries such as China and Russia for at least 30 months, Bloomberg notes. Bloomberg also reports that the bill would apply to any processors exceeding the performance of chips already approved for export, covering products from AMD and Google.

Reuters notes that the bill, introduced by Republican Senator Pete Ricketts and Democrat Chris Coons, marks a rare move by members of Trump’s own party to prevent him from further easing tech export controls on China. Ricketts said the bill is essential to preserving the U.S. advantage over China in AI. Bloomberg cites him as saying that the most advanced AI chips are produced by American companies, and that denying Beijing access to them is critical to U.S. national security.

The legislation also poses a new challenge for NVIDIA, undercutting its effort to persuade the Trump administration and Congress to relax export restrictions on its high-end AI chips, Bloomberg indicates. Reuters adds that the bill comes as the administration is weighing whether to authorize sales of NVIDIA’s H200 AI processors to China.

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• [News] Trump Might Approve 50% Scaled-Down NVIDIA Blackwell for China — Still Beats All Local Chips
• [News] NVIDIA Posts Record Q3 on Blackwell Ultra, Eyes Strong Q4 — H20 Sales Stall at $50M

(Photo credit: NVIDIA)

As China accelerates its push for semiconductor self-sufficiency, all eyes are on how leading tech firms are advancing cutting-edge technologies under U.S. sanctions, with Huawei clearly at the forefront. According to Nikkei, the Chinese chip giant has dramatically ramped up GPU-related patent filings in recent years while also venturing into sub-2nm technologies, including EUV and advanced lithography, as per data from the Japanese patent research tool Patentfield (Kyoto).

GPU Patents Surge as AI Chip Race Intensifies

The report, citing data from Patentfield, points out that over the five years ending 2023, Huawei’s GPU-related patent filings grew tenfold, outpacing NVIDIA and Intel. In 2023 alone, Huawei filed 3,091 patents—about 10 times its 2018 total, 3 times Intel’s, and 5 times NVIDIA’s—highlighting its rapid advance in GPU technology, as per Nikkei.

Earlier in September, Huawei has unveiled a multi-year roadmap for its Ascend AI chips, with steady releases planned through 2028. According to Mydrivers, the rollout will start with the Ascend 950PR in Q1 2026 and the 950DT in Q4 2026, followed by the Ascend 960 in Q4 2027 and the Ascend 970 in Q4 2028. Among these, a key feature of the 950 chip is Huawei’s self-developed HBM.

Nikkei notes that Samsung Electronics has also ramped up GPU-related patents in recent years, likely fueled by its HBM development for AI data-center workloads. Searches using the combined keywords “GPU + HBM” show the surge began around five years ago. According to Patentfield, Samsung’s GPU+HBM filings remained above 400 in 2023 and 2024, compared with around 300 for NVIDIA.

Dive into Sub-2nm Chipmaking

Notably, as Nikkei suggests, Huawei’s filings also reveal a push into post-2nm semiconductor technology. Searching for patents with the “Gate-all-around” transistor keyword—used in nodes beyond 2nm—shows Huawei submitted 20 patents in 2023, the report adds.

Interestingly, the report notes that Huawei has filed patents covering “CFET” (Complementary FET) and “Transistor”), with CFET enabling 1nm and below nodes through vertically stacked transistors rather than just miniaturization. The filings also feature “EUV” and “Lithography”, reflecting Huawei’s push to advance cutting-edge tech despite U.S. sanctions blocking imports, the report says.

Among these patents, South China Morning Post points to a notable Huawei filing from September 2021—made public last year—that outlines the use of SAQP (Self-Aligned Quadruple Patterning) to “enhance design flexibility of circuit patterns.”

Separately, the report highlights a three-year-old Huawei patent for advanced patterning that is said to reach 2nm-class capabilities without EUV lithography. Under U.S. sanctions, Huawei is seeking a metal-integration method that allows ultra-narrow metal structures to be produced with DUV tools, even at pitches below 21nm—an essential threshold for 2nm-class chips, the report adds.

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• [News] Huawei-Related Firms Spur China’s Chip Buildout Across Materials, Photoresist, and EDA
• [News] Huawei Reportedly Invests in 60+ Chinese Chip Firms to Build Homegrown Supply Chain

(Photo credit: Huawei)

Taiwan’s UMC is pushing into “Made in America.” On the 4th, the company announced that it has signed an MOU with U.S. foundry Polar Semiconductor to explore collaboration opportunities in 8-inch wafer manufacturing in the U.S.. According to Economic Daily News, UMC emphasized that this partnership would allow it to offer customers an 8-inch manufacturing solution in the U.S., following a model similar to its earlier collaboration with Intel. The report adds that details such as investment size have not yet been determined, as the agreement remains at the MOU stage.

Currently, among Taiwan’s foundries, only TSMC has established manufacturing in the U.S., with its facilities located in Arizona. Economic Daily News notes that if UMC ultimately builds capacity in the U.S., both of Taiwan’s foundry giants would have a presence there. The difference, as the report highlights, is that TSMC’s U.S. fabs focus on 12-inch advanced nodes, while UMC is targeting mature-process technologies.

Meanwhile, as Commercial Times notes, this move underscores UMC’s strategy of global expansion through partnerships with U.S.-based foundries. According to the report, amid rising geopolitical risks, securing local U.S. capacity helps reduce supply-chain exposure for customers in aerospace, defense, and other security-sensitive sectors. Compared with TSMC’s fully owned fab model, UMC’s approach offers greater operational flexibility, though the degree of future control will depend on how much each side invests.

As for UMC’s U.S. partner, Economic Daily News notes that Polar—located in Bloomington, Minnesota—is a foundry specializing in high-voltage semiconductors, sensors, and related analog/mixed-signal ICs. According to the report, supported by funding under the CHIPS and Science Act, Polar has secured more than US$100 million for expansion and aims to double its monthly sensor and power-chip capacity from 20,000 wafers to 40,000 within the next one to two years.

UMC Expands Its U.S. Footprint Through Strategic Collaborations

As its press release indicates, Polar and UMC will evaluate which products can be manufactured at Polar’s newly expanded 8-inch fab in Minnesota. The collaboration targets opportunities in automotive, power-grid, robotics, and data-center markets, and aims to combine Polar’s manufacturing strengths with UMC’s comprehensive 8-inch technology portfolio and global customer base.

As highlighted by Commercial Times, this initiative follows UMC’s earlier partnership with Intel on 12nm FinFET, reinforcing its strategy of expanding U.S.-based manufacturing through collaboration. Commercial Times notes that the 12nm project with Intel is reportedly progressing smoothly, with PDKs set for release in January, tape-out scheduled for the first half of 2027, and revenue contributions expected thereafter. Sources cited by the report also indicate that UMC and Intel are already discussing next-generation process options, with Intel 7 and Intel 4 viewed as potential paths for UMC’s next stage of development.

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• [News] Silicon Photonics Momentum Builds: Samsung Ramps R&D in Singapore, UMC Teams With IMEC
• [News] Taiwan’s UMC Reportedly to Slash Supplier Prices 15% in 2026—Mature Node Shake-Up Ahead

(Photo credit: UMC)

As interest around Intel’s EMIB (Embedded Multi-die Interconnect Bridge) continues to build—including reports linking it to a Google-MediaTek TPU—the industry is watching closely for signs of a real ramp. According to Intel’s Corporate Vice President John Pitzer, the technology is expected to begin making a meaningful contribution as it ramps more noticeably in the second half of 2026.

According to Intel’s UBS Global Technology and AI Conference 2025 transcript on Seeking Alpha, initial demand spiked due to a CoWoS shortage. However, Pitzer noted that as Intel showcased its EMIB and EMIB-T roadmap, client interest grew, with EMIB seen as offering capabilities beyond CoWoS. The focus has thus shifted from overflow demand to technology-driven adoption, he added.

Indeed, Intel is accelerating its push in advanced packaging recently. ETNews says it has established its EMIB process at Amkor’s Songdo K5 facility in South Korea, marking its first-ever outsourcing of high-end packaging. Meanwhile, TechPowerUp reports Intel is finalizing its $7 billion “Project Pelican” complex in Malaysia, which will handle both EMIB and Foveros.

According to TrendForce, the company has successfully implemented this technology in its own server CPU platforms, including Sapphire Rapids and Granite Rapids. As Google plans to implement EMIB in its 2027 TPU v9 and Meta considers it for its MTIA accelerators, EMIB is set to significantly boost IFS’s growth.

Opens 18A-P/18A-PT to External Clients

Pitzer highlighted for now, yields for 18A aren’t yet “optimal,” but have improved remarkably since CEO Lip-Bu Tan took charge in March, according to Wccftech. TechPowerUp notes with Panther Lake on schedule, Pitzer said that if monthly 7% yield gains continue, Intel could reach full-volume production without major per-unit cost increases.

Pitzer further noted that while 18A is going to be mostly an internal node, 18A-P will be used both for the internal customer and external customers as well. It is worth noting that he also emphasized that 18A-PT will serve as the base die for advanced packaging and will be used for both Intel’s own products and for external customers.

Notably, as per the transcript, Intel expects about 70% of the logic compute tiles for Panther Lake to be produced internally—compared with 0% for Arrow Lake and Lunar Lake. The share will improve further with Nova Lake, which extends the strategy to desktop parts. By the end of 2026 and into 2027, Intel will also benefit from bringing desktop wafers back in-house, expanding internal production beyond notebooks, as noted in the transcript.

More Colors on 14A

Regarding 14A progress, Intel noted in the transcript that it has engaged external customers in the definitional phase. As the key question is when Intel will secure external customers for 14A or 18AP, fabless customers are expected to make firm decisions on 14A designs between the second half of 2026 and the first half of 2027, according to Pitzer.

As Intel’s 14A node is a second-generation gate-all-around technology with second-generation backside power, the node could build on lessons from 18A, according to Pitzer. While 18A pushed physics in new ways, 14A is already showing meaningful lead in yield and performance compared with 18A at a similar stage, offering a promising outlook, he added.

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• [News] Intel Reportedly Taps Amkor’s Songdo Facility for EMIB Packaging in First-Ever Outsourcing Move
• [News] Intel Gains Momentum: 18A Eyes Apple, EMIB Reportedly Tapped for Google-MediaTek TPUs

(Photo credit: Intel)

Innoscience announced that the U.S. International Trade Commission ruled in favor of the company and against Infineon Technologies in a section 337 (patent infringement) investigation that was brought by Infineon against the Chinese GaN giant. The court ruled that Infineon’s U.S. Patent No. 9,070,755 covering electrode design had not been infringed by any Innoscience products, and Infineon’s other U.S. Patent No. 9,899,481 covering package design was found not infringed by all current Innoscience products based on the company’s newest GaN process technology, with only certain legacy high voltage products implicated. This action by the ITC effectively invalidated Infineon’s attempt to use these patents to restrict Innoscience’s development.

Due to the advantages of GaN over legacy silicon-based power devices, GaN power devices are being widely adopted in electric vehicles, renewable energy systems, and AI data-center power architectures. Given GaN’s strategic importance in these markets—and Innoscience’s strong competitive position—certain industry players have attempted to slow Innoscience’s momentum through patent litigation. However, this effort failed entirely. Instead of hindering Innoscience’s progress, Infineon’s lawsuit only brought more attention to Innoscience and its technology leadership. This outcome represents the success of a next-generation industry challenger over a traditional incumbent—and a meaningful win for GaN technology.

As noted by Cailian press, Infineon filed four patent infringement claims with the ITC in July 2024, but later withdrew all allegations related to two of the patents during the review process. The ITC’s determination that the remaining two patents are also not infringed marks another key victory for Innoscience in this patent battle and is expected to clear the path for the global development of the GaN industry.

Innoscience holds leading position in 8-inch GaN. According to STAR Market Daily, the company is the world’s first to achieve mass production of 8-inch silicon-based GaN wafers and remains the only firm globally offering a full voltage range of silicon-based GaN products at industrial scale. By the end of 2024, its monthly GaN wafer output had reached 13,000 wafers with a yield rate exceeding 95%, the report adds.

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• [News] onsemi Partners With China’s Innoscience on Low/Mid-Voltage GaN, Sampling Expected in 1H26
• [News] NVIDIA Picks Innoscience as Sole Chinese Supplier for 800 VDC Power—Unpacking the GaN Giant

(Photo credit: Innoscience)

Recently, PSR Semi, based in Jiangsu China, announced the successful closing of a Series A funding round worth RMB several hundred million. The round was led by prominent investors including Yongxin Fangzhou, Jinyuan Capital, and Hefei Industry Investment, among others.

Headquartered in Wuxi, PSR brings together a multinational R&D team of top-tier experts in thin-film deposition equipment. Its core team is led by more than 10 overseas PhD holders, five of whom have been selected for national-level talent programs.

PSR specializes in advanced ALD, PECVD and specialty epitaxy equipment technologies, delivering products with fully independent intellectual property and global competitiveness. Its portfolio spans tALD, PEALD, SI EPI, SiC EPI and PECVD core technologies, serving applications in high-end integrated circuits, power devices, RF components and advanced packaging.

The company has also built a full-lifecycle service ecosystem covering process tuning, technical training and 24/7 rapid response. Supported by a precision component management system and a robust supply chain, the company ensures reliable and efficient operation of customers’ production lines.

(Photo credit: FREEPIK)

An unexpected AI market is emerging in China, as companion toys designed for interaction and comfort surge in popularity. According to Commercial Times, Chinese tech giants including Huawei, JD.com, and UBTECH Robotics have recently entered the AI toy market. The report notes that these so-called “AI toys” are not traditional electronic pets but intelligent devices equipped with AI models and emotional-computing capabilities. They feature memory and contextual awareness, enabling them to converse with users in a human-like manner through voice and facial recognition.

China’s Tech Giants Race Into the AI Toy Market

On December 1, as noted by Ifnews, UBTECH Robotics introduced new additions to its “Meng UU” family series. This marks the company’s second AI companion product since June 2025. The device is already available for preorder through Tmall’s Meng UU flagship store and UBTECH Robotics’ Douyin livestream channel, with an initial limited release of 2,000 units.

Huawei has also joined the competition with its own plush AI companion. According to Gizmochina, the company unveiled its first AI-driven emotional pet, Smart Hanhan, during the recent Mate 80 series launch. Priced at 399 yuan (about $56), the product went on sale on Huawei Mall, where all three color versions quickly sold out. As noted by Notebookcheck, Smart Hanhan features circular eye displays that respond to touch or voice commands, along with speakers, microphones, and a chatbot app designed for HarmonyOS 5.

Other major Chinese players such as e-commerce platform JD.com and smartphone brand Honor have also entered the AI toy market, as noted by Ifnews. The report further indicates that venture capital firms are actively investing in the sector, with public data showing more than 30 funding rounds since 2024 and prominent investors including IDG Capital and HongShan participating. Meanwhile, more than 20 AI toy–related startups, including Haivivi and Robopoet, have secured financing, the report adds.

The AI toy market shows strong growth potential. As noted by Ifnews, according to the AI Toy Consumption Trend White Paper jointly released by JD.com and the Shenzhen Toy Industry Association, the global AI toy market is expected to exceed 100 billion yuan by 2030, with an annual compound growth rate of over 50%. China’s domestic market is also projected to surpass 10 billion yuan, with a compound annual growth rate of more than 70%.

Commercial Times further notes that AI toys are highly attractive to the hardware industry due to their strong profit margins. According to sources cited by the report, entry-level AI toys priced between 300 and 400 yuan typically carry gross margins of around 50% to 65%. Mid- to high-end models priced between 1,500 and 3,000 yuan can reach gross margins of 70% to 85%.

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• [News] China Claims New Architecture Using 14nm Logic and 18nm DRAM Could Match NVIDIA 4nm GPUs
• [News] The Humanoid Robotics Race: U.S. Leads in AI, China Dominates Supply Chains—Who Will Prevail?

(Photo credit: Huawei)

TSMC has been actively expanding its advanced packaging capacity. According to MoneyDJ, the company held an opening ceremony for its AP7 facility in Chiayi, Taiwan, on the 4th. Supply chain sources note that Phase 2 of AP7 has recently begun equipment installation and testing, with production expected to start in 2026, while Phase 1 is scheduled for equipment move-in in 2026 and mass production in 2027. Because archaeological remains were previously discovered at the P1 site, its construction was delayed, allowing P2 to start earlier and advance more quickly, the report adds.

Beyond AP7 in Taiwan, TSMC is also accelerating its advanced packaging efforts in the U.S.. As Liberty Times notes, sources say TSMC’s U.S. fab is advancing quickly, and its packaging timeline can no longer wait for a completely new site outside the current campus. TSMC is therefore expected to repurpose the area originally planned for Phase 6 (P6) to build an advanced packaging facility. If construction proceeds smoothly, equipment installation could begin by the end of 2027, moving the facility into the pre-production stage.

In Chiayi, Taiwan, MoneyDJ notes that AP7 will host TSMC’s latest packaging technologies — including WMCM (wafer-level multichip module), SoIC (system on integrated chips), and CoPoS (Chip-on-Panel-on-Substrate). The site spans 15,000 square meters and is planned across eight phases. As the report notes, citing sources, Phases 1 and 3 will prioritize SoIC expansion, while Phase 2 is set to operate as an Apple-dedicated WMCM production base. CoPoS is currently planned for large-scale mass production in Phase 4, with output expected around the end of 2028.

Regarding its U.S. advanced packaging plans, Liberty Times notes that wafers produced at TSMC’s American fab currently still need to be shipped back to Taiwan for assembly and testing. According to the report, TSMC intends to establish advanced packaging capability in the United States through a mix of building its own facilities and forming strategic partnerships. The report also states that Amkor is investing in a local plant near TSMC’s site to provide back-end packaging and testing services, with construction already underway and production expected to begin in 2028.

TSMC Advances Next-Generation Packaging Through Integrated Technologies

Citing industry sources, MoneyDJ highlights that TSMC’s advanced packaging roadmap will increasingly emphasize “integrating multiple technologies,” with SoIC-based 3D packaging taking on a central role, a capability that outsourced assembly and test firms cannot easily replicate. The report notes that future packaging technologies for chips beyond 2 nm will pair SoIC with approaches such as CoWoS (Chip on Wafer on Substrate), CoPoS, and InFO (Integrated Fan-Out). Examples include AMD’s use of a SoIC + CoWoS structure and TSMC’s COUPE platform, which applies SoIC-X chip-stacking technology to provide optimized solutions for customers.

Meanwhile, as noted by Commercial Times, citing institutional investors, TSMC is increasing the localization of its back-end capital expenditure and strengthening collaboration with domestic equipment suppliers. This strategy is allowing related companies to enter the CoWoS, SoIC, and WMCM supply chains, enhancing both responsiveness and flexibility.

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• [News] TSMC Reportedly Plans 12 New Advanced Process and Packaging Fabs in Taiwan as 2nm Supply Tightens
• [News] TSMC Reportedly Denies Halting 2nd Phase of Chiayi, Taiwan Packaging Plant Amid U.S. Expansion

(Photo credit: TSMC)

As 2025 draws to a close, tech giants are rapidly reshuffling their organizations. After Samsung reinstated its dual-CEO structure and elevated Roh Tae-moon, SK hynix followed on the 4th with a major move of its own—launching a dedicated HBM taskforce to accelerate its AI-memory push, according to ZDNet and the Chosun Biz.

To provide faster support for key HBM customers, the company is reportedly establishing a dedicated HBM technical unit in the Americas. It is also creating separate teams focused on HBM packaging yield and quality—moves designed to expand its presence in the custom HBM market and build a fully integrated, end-to-end HBM organization, the reports add.

Global Expansion a Key Part of Restructuring

The latest reorganization also puts major weight on global expansion. According to ZDNet, the company will set up Global AI Research Centers in the U.S., China, and Japan, with CTO Ahn Hyun leading the effort. The U.S. center, in particular, aims to bring in “guru-level” talent to push SK hynix’s system research capabilities, as per ZDNet.

At the same time, SK hynix is pressing ahead with its advanced packaging fab in Indiana and launching a new Global Infrastructure division to bolster worldwide manufacturing strength. The unit will be led by Kim Chun-hwan, a veteran with deep experience across the company’s Icheon and Cheongju fabs, the report notes.

As reported by Tech in Asia, the US$3.87 billion chip-packaging and R&D complex in Indiana—backed by US$458 million in direct CHIPS Act funding and up to US$500 million in loans—is slated to start mass-producing HBM chips in the second half of 2028.

Meanwhile, SK hynix is not only launching a Macro Research Center to provide AI- and semiconductor-focused strategic insights and operating a customer-centric “Intelligence Hub,” but is also strengthening its leadership pipeline.

ZDNet and the Chosun Biz note that Manufacturing and technology veteran Lee Byeong-gi has been elevated to Chief Product Officer, where he will drive innovation across the company’s global production network. Yield-and-quality specialist Kwon Jae-soon and eSSD development lead Kim Cheon-seong were likewise promoted to head the M&T unit and Solution Development, respectively, the reports add.

2026 Expansion Strategy

It is interesting to note that as per DealSite, Samsung Electronics and SK hynix are ramping up DRAM production for 2026—but with strikingly different playbooks. The report suggests that while Samsung is betting big on general-purpose DRAM, including DDR5, LPDDR5X, and GDDR7 amid rising memory prices, SK hynix plans to expand output but funnel much of that capacity toward HBM.

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• [News] Memory Price Rally May Run Past 2028 as Samsung, SK hynix Reportedly Cautious on Expansion
• Global DRAM Revenue Jumps 30.9% in 3Q25, Micron’s Market Share Climbs by 3.7 Percentage Points, Says TrendForce

(Photo credit: SK hynix)

Intel’s effort to shed non-core operations appears to be shifting, as the company now plans to retain its networking and edge (NEX) business. According to Reuters, Intel concluded after reviewing a potential sale that keeping NEX would be more advantageous. Bloomberg notes that the company believes retaining the unit will enable tighter integration across silicon, software, and systems, strengthening its position in AI, data center, and edge markets.

Reuters notes that Intel had previously considered selling various assets as it looked to improve its financial footing, but its cash position has strengthened significantly. According to the report, Intel has secured an $8.9 billion investment from the U.S. government for a 10% stake, along with $2 billion from SoftBank Group and $5 billion from NVIDIA.

The company is also gaining traction with potential customers. According to Tom’s Hardware and Commercial Times, Apple is eyeing Intel’s 18A node for M-series chips as soon as 2027, while MediaTek is exploring EMIB advanced packaging to secure additional capacity.

As part of the decision to keep its NEX business, Intel has ended discussions with Ericsson AB, which had been exploring a potential stake in the unit, as highlighted by Bloomberg. Earlier this year, Intel had indicated that it planned to separate the division and was seeking strategic investors.

Ericsson had explored an investment earlier this year to help stabilize Intel’s business. Bloomberg notes that the viability of Intel’s NEX division was particularly important for the Swedish telecom equipment maker, whose mobile network hardware relies heavily on Intel-designed chips.

The relationship between Intel and Ericsson had already deepened early last year when Ericsson announced that its future infrastructure would be built on Intel’s next-generation Xeon processors to achieve greater speed and energy efficiency, according to Bloomberg.

Read more

• [News] Intel Gains Momentum: 18A Eyes Apple, EMIB Reportedly Tapped for Google-MediaTek TPUs
• [News] Intel Spins off Network and Edge Unit to Sharpen Focus on Core Strategy After $2.9B Q2 Loss

(Photo credit: Intel)

Amid a severe memory crunch driven by soaring demand from data centers and hyperscalers, Micron announced Wednesday that it will exit the consumer memory market. As Tom’s Hardware notes, the move signals a shift in production and investment toward enterprise-grade DRAM and SSDs to keep pace with the growing AI demand.

Micron’s business chief Sumit Sadana said the company is winding down its Crucial consumer business to focus supply on its largest strategic customers in fast-growing markets. Tom’s Hardware reports that after the end of its fiscal second quarter in late February 2026, Crucial consumer products will be discontinued, while Micron’s enterprise portfolio will remain available via commercial and server-focused channels.

Yonhap News reports that Crucial includes PC components, laptop DRAM, and consumer SSDs, while CNBC notes the 29-year-old brand serves DIY builders and upgraders with plug-in memory modules and personal-system SSDs.

Micron’s Strategic Shift

CNBC points out that while Micron hasn’t detailed Crucial’s revenue, the move highlights a bigger trend: the AI boom is tightening global memory supplies as tech giants invest hundreds of billions to build massive data centers over the next few years.

As CNBC notes, AI processors, including NVIDIA’s and AMD’s GPUs, consume huge volumes of cutting-edge memory. NVIDIA’s current-generation GB200 GPU, for instance, packs 192GB of memory per chip, while Google’s newest AI processor, the Ironwood TPU, also requires 192GB of high-bandwidth memory, the report adds.

Notably, Micron is a major supplier to AMD, providing 12H HBM3E memory for the company’s flagship MI350 chip, which boasts 288GB of high-bandwidth memory, according to the company’s press release.

As Reuters suggests, tech giants like Microsoft, Google, and ByteDance are racing to secure memory supplies from chipmakers including Micron, Samsung Electronics, and SK hynix amid tight supply.

Memory Giants Pull Back from Consumer Market

Micron’s latest decision isn’t the first among memory giants to cut back on consumer-grade chips. Samsung and SK hynix also plan to wind down DDR4 production, though South Korea’s Maeil Business Newspaper reports that both will continue manufacturing into next year. Reuters suggests that following suit, China’s ChangXin reportedly ended most of its DDR4 production, though the company declined to comment.

Intensifying Memory Crunch

Citing data from TrendForce, Reuters reports that average DRAM inventories—the memory widely used in computers and smartphones—fell to just two to four weeks in October, down from three to eight weeks in July and 13 to 17 weeks in late 2024.

A memory-chip executive told Reuters that the shortage could delay upcoming data-center projects. Expanding capacity takes at least two years, and manufacturers are wary of overbuilding, fearing chips could sit idle if the AI-driven demand surge slows, the report adds.

Read more

• [News] Micron’s New York Megafabs Reportedly Face 2–3 Year Delay, First Now Set for Late 2030
• [News] Micron Reportedly Exits China Server Chips; Samsung, SK hynix, and Local Makers Stand to Gain

(Photo credit: Micron)

On November 25, China-based MTC announced the small-batch shipment of its DFB (Distributed Feedback Laser Diode) chips, which can address the demands in optical communications market.

At its 20th-anniversary conference earlier this year, MTC highlighted strong confidence in the semiconductor laser market—including photonic chips for optical communications—and designated compound semiconductor photonic chips, devices, and modules as key strategic pillars for the next two decades.

Currently, MTC has built a vertically integrated chain covering from photonic chip, optical device to optical module. Building on its in-house LED photonic chip manufacturing technologies, MTC has been advancing its optical-communications chip business through its sub- subsidiary IMTC. MTC plans to launch EML chips and CW light sources in 2026.

MTC also disclosed that it has advanced toward Micro LED technology for optical communications application, which is currently under development. The company intends to increase R&D investment in Micro LED optical interconnect technologies to address AI deployment requirements for lower latency, higher bandwidth, and reduced power consumption.

As to optical module, MTC has already delivered traditional 100G-and-below products at scale to leading equipment manufacturers, steadily increasing its market share. Its 400G/800G high-speed modules have completed project initiation and entered customer sampling and validation. Meanwhile, the company has launched an intelligent upgrade of its optical-module production lines to expand delivery capacity and meet rapidly growing demand in the years ahead.

(Photo credit: FREEPIK)

onsemi and Innoscience signed a memorandum of understanding (MoU) on December 2 to speed up the deployment of GaN power devices, starting with 40–200V offerings. onsemi expects sampling to begin in the first half of 2026, as noted in its press release. The partnership aims to combine onsemi’s expertise in integrated systems with Innoscience’s 8-inch GaN technology to support products for industrial, automotive, telecom infrastructure, consumer, and AI data center applications.

According to Chinese outlet ICrank, the partnership brings complementary strengths together: Innoscience’s wafer capacity enables mass production, while onsemi’s packaging and system-integration technologies enhance device performance.

This foundation is reinforced by Innoscience’s leading position in 8-inch GaN. According to STAR Market Daily, the company is the world’s first to achieve mass production of 8-inch silicon-based GaN wafers and remains the only firm globally offering a full voltage range of silicon-based GaN products at industrial scale. By the end of 2024, its monthly GaN wafer output had reached 13,000 wafers with a yield rate exceeding 95%, the report adds.

onsemi Builds Flexible Capacity to Drive Global GaN Deployment

As Gurufocus highlights, onsemi — the world’s second-largest power chipmaker and the leading supplier of automotive image sensors — has transitioned from a heavily vertically integrated model to a hybrid manufacturing strategy, enabling greater capacity flexibility. The company is also shifting its strategic focus toward emerging segments such as EVs, autonomous driving, industrial automation, and renewable energy.

onsemi believes this collaboration will expand its low- and mid-voltage (40V to 200V) GaN power device portfolio and increase global GaN production capacity, enabling faster product rollout and broader adoption, as noted by Anue. Antoine Jalabert, vice president of corporate strategy at onsemi, adds that partnering with Innoscience will give the company access to the industry’s largest GaN manufacturing base, allowing it to scale its GaN portfolio rapidly for customers worldwide.

Read more

• [News] GlobalFoundries Moves on GaN: TSMC and Navitas Ties Position U.S. as New GaN Production Hub
• [News] Onsemi to Receive €450M Government Grant for Advanced SiC Power Device Fab in Czech Republic

(Photo credit: onsemi)

With memory supply extremely tight, mid- to small-size module makers are being hit by delivery delays and sharp price spikes. A customer notice shared by tipster Jukan on X shows Transcend was abruptly informed by key NAND suppliers—SanDisk and Samsung—that upcoming shipments are being pushed back yet again. With major chipmakers prioritizing top customers, prices are surging, and Transcend was told costs jumped 50–100% in just the past week, the notice indicates.

Wealth Magazine reports—via Transcend Chairman Peter Shu—that despite Transcend’s 32-year partnership with Samsung, contract prices shifted from quarterly to monthly as Q4 began. Wealth Magazine adds that Samsung delivered no DRAM to Transcend in October and even halted November pricing. Meanwhile, Sandisk, its NAND Flash supplier, reportedly hiked November contract prices by 50% in one shot.

The latest notice indicates that with key NAND Flash suppliers SanDisk and Samsung delaying deliveries again, Transcend’s Q4 chip allocation has been sharply cut—and it hasn’t received any new shipments since October. The statement attributes the crunch to surging demand from data centers and hyperscalers, which major chipmakers are prioritizing, driving up prices and leaving supply extremely limited.

According to the notice, Transcend observes that the price uptrend is continuing in a very fast pace and abnormal percentage, with the situation expected to continue for at least the next 3 to 5 months. Thus, the company warns that its NAND Flash products—including SSDs, SD cards, and flash drives—will be affected in the rest of Q4, with longer lead times and significantly higher prices compared to Q3 and earlier.

Notably, this aligns with TrendForce’s latest research, which shows that demand for NAND Flash stayed strong in November 2025, fueled by AI applications and solid enterprise SSD orders. Meanwhile, suppliers continued to focus on capacity for high-margin enterprise and premium products, while old-node capacity was quickly phased out.

This led to a further tightening of wafer supply, causing November contract prices for mainstream wafers to rise sharply. According to TrendForce, monthly average price increases varied from 20% to over 60% across all product categories, with the surge quickly expanding to all density segments.

TrendForce reports that NAND Flash suppliers’ inventory fell sharply from 10–15 weeks in early Q3 to just 7–10 weeks at the start of Q4 2025.

Read more

• [News] U.S., Japan Rumored Mulling Joint NAND Fab, with Kioxia, SanDisk Likely In
• [News] NAND Giants Reportedly Cut Output in 2H25 as Prices Surge; Samsung Mulls 20–30% Hike in 2026

(Photo credit: Samsung)

Google’s TPU is gaining traction as a strong alternative to NVIDIA, and Samsung is emerging as a beneficiary of the growing ASIC trend. According to Chosun Biz, Samsung Electronics is supplying HBM to Broadcom, the world’s largest ASIC design company, and its sixth-generation HBM (HBM4) has reportedly surpassed Broadcom’s initial performance targets in testing.

Sources cited in the report note that Samsung’s HBM4, expected to go into full supply in 2026, has outperformed its early performance targets in Broadcom’s evaluations. After falling behind SK hynix in prior years, Samsung has attempted to differentiate its HBM4 offering by enhancing both its DRAM and logic die technologies. Thus far, the broader semiconductor industry has offered largely favorable assessments, the report adds.

Samsung is currently supplying its fifth-generation HBM3E, primarily 8-high stacks, for Google’s TPUs via Broadcom, the report notes. The company has offered larger volumes at lower prices than SK hynix, and its products have cleared quality tests without major issues, helping it steadily expand its share.

Samsung’s Growing Momentum in Google’s TPU Supply Chain

The report also indicates that Samsung is positioned to strengthen its foothold in 2026 as demand for Google’s TPUs increases. An industry expert cited in the report notes that Google’s seventh-generation TPU this year uses fifth-generation HBM3E, while the eighth-generation model slated for 2026 will shift to HBM4, and Samsung is expected to supply more than twice as much volume to Google in 2026 compared with 2025.

Industry estimates suggest that Samsung and SK hynix supplied Google with comparable HBM volumes this year, and some analysts believe Samsung may even hold a small lead. As the report underscores, there is growing speculation that Samsung could overtake SK hynix in 2026.

Samsung Poised to Leverage Flexible Capacity Amid Shifting Market Structure

Another factor that could give Samsung an advantage in 2026’s supply is its ability to scale production more flexibly. According to the report, Samsung is thought to have multiple expansion options, including new lines at its Pyeongtaek campus, enabling it to deliver substantially higher volumes. In contrast, SK hynix is already the primary HBM supplier to NVIDIA and other major Big Tech firms, leaving limited capacity for additional output in the near term.

As E-Science points out, within the TPU ecosystem, Samsung Electronics and SK hynix are poised to establish a “two-way system” anchored by their substantial production capabilities, whereas U.S. manufacturer Micron is trailing its competitors.

Read more

• [News] Samsung Reportedly Supplies 60%+ of Google TPU HBM3E, Set to Remain Primary Supplier in 2026
• [News] Meta Reportedly Weighs Google TPU Deployment in 2027, Boosting Broadcom, Taiwan’s GUC

(Photo credit: Google)

According to TrendForce’s latest memory spot price trend report, regarding DRAM, DDR4 quotes remain above DDR5, and despite already-high spot rates, there’s no sign of a drop. Meanwhile, in NAND, some sellers chasing higher profits are reneging on previously confirmed deals, risking their reputation while pushing for new price talks. Details are as follows:

DRAM Spot Price:

Currently, spot prices are quite volatile, with DDR4 chip prices continuing to rise. DDR4 quotes are, on the whole, still higher compared to DDR5 quotes. Although spot prices are already very high, there are no signs of a decline. The average spot price of mainstream chips (i.e., DDR4 1Gx8 3200MT/s) has increased by 10.73% from US$14.914 last week (November 26) to US$16.514 this week (December 2).

NAND Flash Spot Price:

Frequent adjustments of quotations within a single day have been observed from the spot market under the expectation of exceedingly constrained supply and increasing prices. Some of the sellers, who are pursuing for an even higher profitability, are denying concluded prices confirmed previously at the cost of their reputation, and requesting new price negotiations, which fully reflects the increasingly intense level of panic buy orders within the spot market. Spot prices of 512Gb rose by 5.90% this week (December 2), arriving at US$9.607.

Under tightening U.S. export restrictions, China is turning to innovative chip architectures to bolster computing capabilities. According to South China Morning Post, this strategy—pairing mature-node chips with novel system designs—aims to narrow the performance gap with NVIDIA.

South China Morning Post cites Wei Shaojun, vice-president of the China Semiconductor Industry Association, who argues that 14nm logic chips, when combined with high-performance memory and an advanced computing architecture, could approach the capabilities of NVIDIA’s 4nm AI-training processors. He further emphasizes that his proposed framework is built on a “fully home-grown supply chain.”

Wei’s approach centers on “software-defined near-memory computing,” using 3D hybrid bonding to stack 14nm logic dies with 18nm DRAM. Near-memory computing places processors closer to memory in a hardware–software co-design to reduce data movement and improve efficiency, the report adds.

Tom’s Hardware notes 3D hybrid bonding (copper-to-copper and oxide bonding), which replaces solder bumps with direct copper interconnects at sub-10 µm pitches, is a key element of the proposed design.

The solution also seeks to reduce market dependence on NVIDIA’s CUDA ecosystem, according to Commercial Times. Wei identifies CUDA as a major point of vulnerability, noting that once software, models, and hardware become tied to a single proprietary platform, deploying alternative processors becomes exceedingly difficult, as noted by Tom’s Hardware.

Chinese outlet PCPOP indicates that Wei has disclosed additional performance claims, stating that the domestic design achieves 2 TFLOPS per watt and a total of 120 TFLOPS—figures he said surpass NVIDIA’s A100 GPU. However, official specifications show that the A100 reaches up to 312 TFLOPS, well above the Chinese solution’s capabilities.

The underlying concept of using stacking design to offset limits in process technology is being echoed by other Chinese tech leaders. According to South China Morning Post, Huawei founder Ren Zhengfei argues that China can reach cutting-edge performance through chip “stacking and clustering,” without engaging in a direct node-by-node contest.

Read more

• [News] Huawei Unveils Ascend 950 with In-House HBM in 2026, Touts SuperPoD to Rival NVIDIA
• [News] China’s Zhonghao Xinying Claims TPU 1.5× Faster than NVIDIA A100 Amid Google TPU Buzz

(Photo credit: FREEPIK)

As Prime Minister Sanae Takaichi’s recent comments further strain Japan–China relations, rumors are now swirling that Tokyo has tightened controls on photoresist exports crucial for wafer production—stoking new fears over China’s chip output, according to the Commercial Times.

Commercial Times notes Japan controls over 70% of the global photoresist market—and a staggering 95% of high-end EUV resists. Meanwhile, China’s photoresist industry, starting two decades late, still struggled: in 2022, less than 5% of high-end resists were locally produced, as per anue.

Commercial Times further explains that China could meet only about 5% of its own demand for KrF DUV resists used in 110–180 nm chip manufacturing. And when it comes to ArF DUV resists—needed for 7–65 nm production—China is almost entirely dependent on Japanese suppliers, the report adds.

Companies Potentially Involved

Several Japanese companies have been linked to alleged export curbs to China. Commercial Times reports that Shin-Etsu Chemical and Tokyo Ohka, which together control about 80% of the global market, have paused ArF photoresist shipments to certain Chinese fabs. However, industry sources cited by te report also suggest the rumors may have started when Shin-Etsu, facing limited KrF capacity, restricted supplies to smaller Chinese fabs—sparking speculation even though Tokyo has issued no official export ban.

Asia Times reports that around mid-November, unverified claims on Chinese social media suggested Canon, Nikon, and Mitsubishi Chemical had stopped photoresist shipments. However, the claims are dubious: Canon and Nikon actually make lithography machines and parts, while Mitsubishi Chemical supplies only Lithomax, a raw material for photoresists, the report notes.

If true, the rumors could hit hard. Commercial Times notes that high-end photoresists last only three to six months, making stockpiling nearly impossible. Without steady supplies, China’s major foundries could cut output—or even halt production entirely. In 2021, a temporary Shin-Etsu pause reportedly slashed SMIC’s efficiency by around 20%.

China’s Countermeasures

In anticipation of potential sanctions, China has been moving to shore up its photoresist capabilities. Asia Times reports that while imports will still lead, the country aims to produce 40% of its own resists by 2026—up from a localization rate of around 10% in 2024, according to Anue. The report adds that Kehua has developed KrF resists for 45nm chips, and a Peking University team has improved resist stability, gradually extending use from 28nm toward more advanced nodes.

Meanwhile, Commercial Times reports that Beijing rolled out its first EUV photoresist testing standard in October to set a clearer technical framework. The government is also steering the second phase of the national semiconductor fund to prioritize photoresists and other key materials, while pushing domestic wafer fabs to favor qualified local suppliers, the report adds.

Read more

• [News] Huawei-Related Firms Spur China’s Chip Buildout Across Materials, Photoresist, and EDA
• [News] Huawei Reportedly Invests in 60+ Chinese Chip Firms to Build Homegrown Supply Chain

(Photo credit: Shin-Etsu Chemical)

On November 19, China’s Shenzhen Kuotan Semiconductor Technology (Huizhou Huishikang Technology) announced plans to invest RMB 1.15 billion to build the world’s largest 12-inch optical-grade silicon carbide (SiC) materials production base in Zhongkai district, Huizhou, Guangdong.

The project covers 30,000m², with an annual capacity target of 200,000 wafers and projected yearly output value exceeding RMB 3.6 billion. Positioned directly at the high-end optical waveguide material segment, the initiative aims to break long-standing foreign monopolies and establish a domestically sourced materials foundation for AI chips, quantum communications, and AR/VR devices.

Huizhou Huishikang Technology was incorporated on 17 September 2025. Labeled as a “subsidiary under Kuotan Semiconductor,” the company was clearly set up specifically for the Zhongkai project.

Kuotan Semiconductor (Huizhou Huikang) achieved the transition from 8-inch to 12-inch wafers in just two years. In June 2022, the firm developed China’s  Bay Area’s first 8-inch SiC substrate, which was soon validated by major global chipmakers. This August, its 12-inch SiC optical waveguide material rolled off the line in Huizhou, placing the company among a small group worldwide capable of producing both large-diameter conductive and high-purity single-crystal SiC.

According to Chairman Yao Yongxing, the new material, characterized by low absorption, high transmittance, and an ultra-high refractive index of 2.7, is one of the most advanced optical materials known today. It is designed to meet AR/AI glasses demands for ultra-thin form factors while supporting the stringent optical requirements of high-speed optical communications, LiDAR, and quantum communication chips.

Phase I of the project involves a RMB 300m investment to construct an optical-grade 12-inch SiC production line with a planned capacity of 50,000 wafer annually within one year. Products will include optical waveguide materials and CoWoS advanced-packaging interposer layers, serving AR/VR optical waveguide lenses, high-speed optical communications, LiDAR, and 2.5D/3D advanced packaging for AI chips and GPUs. While the company has not disclosed further investment or capacity ramp-up details, its overarching goal is clear: to establish a 200,000-wafer-per-year operation in Zhongkai with RMB 3.6 billion annual output—making it the world’s largest production base for 12-inch SiC materials.

(Photo credit: FREEPIK)