According to TrendForce’s latest memory spot price trend report, regarding DRAM, the price increase for DDR4 remains more significant compared to DDR5, and Samsung has clearly stated it will not defer its EOL plan. As a result, supply will decline rapidly for DDR4 in 2026, leading to the highest per-Gb price. Meanwhile, in NAND, spot prices have further risen under the expectation of increasing contract prices for 1Q26, though transaction remains limited. Details are as follows:

DRAM Spot Price:

Although year-end has arrived, with factories conducting successive inventory checks and some profit-taking intentions, purchasing momentum has slightly moderated. However, this does not alter the current trend of rising spot prices. The price increase for DDR4 remains more significant compared to DDR5, and Samsung has clearly stated it will not defer its EOL plan. As a result, supply will decline rapidly for DDR4 in 2026, leading to the highest per-Gb price. Overall, spot prices remain strong. The average spot price of mainstream chips (i.e., DDR4 1Gx8 3200MT/s) has increased by 6.80% from US$22.235 last week (Dec. 24) to US$23.746 this week (Dec. 30).

NAND Flash Spot Price:

Spot prices have further risen under the expectation of increasing contract prices for 1Q26. However, some of the buyers are on the fence due to the relatively higher spot prices right now, together with the weak extent of consumer demand, as well as how fabs are soon to go on holiday as Chinese New Year approaches. Spot traders have also not compromised on prices for shipment due to their optimism on subsequent price trends, thus resulting in sluggish market transactions. Spot prices of 512Gb TLC wafers have risen by 13.35% this week, arriving at US$13.055.

TSMC has announced that its 2nm process has entered mass production on schedule this quarter, with momentum at the advanced-node level continuing to build. According to Economic Daily News, sources say that because its 2nm yields have exceeded expectations, the company’s 1.4nm advanced process fab in Central Taiwan Science Park could also see an accelerated rollout. The new fab is expected to complete risk production by the end of 2027, with volume production targeted for 2028.

As the report indicates, the fab began foundation piling work in early November. More recently, tenders for the Central Utility Plant (CUP) have been completed, and bidding for the main fab construction is expected to begin soon.

TSMC’s Central Taiwan Fab Moves to 1.4nm, 1nm Reportedly Possible

The report notes that the Central Taiwan Science Park Administration said TSMC confirmed during a land-lease briefing a shift from the originally planned 2nm process to a 1.4nm process or an even more advanced node. Industry sources cited by the report also say that 1nm process could potentially be deployed at the Central Taiwan Science Park fab earlier than expected.

TSMC plans to introduce its 2nm and 1.6nm processes at its Arizona fabs, while prioritizing 1.4nm production in Taiwan, the report indicates. As a result, once the Central Taiwan Science Park fab enters volume production, it is expected to become the world’s largest manufacturing base for AI and HPC chips.

The new Central Taiwan Science Park fab complex is planned to include four fab buildings and an office facility, with total investment estimated at around NT$1.5 trillion and initial annual revenue expected to exceed NT$500 billion, as the report highlights.

TSMC Accelerates Advanced Process Timelines in Arizona

The foundry giant has also been pushing ahead with advanced process manufacturing in the U.S. According to Economic Daily News, sources say that the second fab at TSMC’s Arizona site could reach 3nm volume production up to a year earlier than originally planned. The fab had been slated for mass production in 2028, but TSMC may accelerate the timeline to early 2027 or even sometime in 2026, using 3nm technology.

In addition, the report notes that the third Arizona fab could begin volume production of 2nm and A16 processes as early as around 2028. The progress of both fabs would be at least four quarters ahead of the company’s original targets.

Read more

• [News] TSMC Reportedly to Raise Sub-3nm Prices 3-10% in 2026, Plans Hikes Through 2029
• [News] TSMC’s Bold Pivot: Kumamoto Fab 2 Reportedly Leaps from 6nm to 2nm amid JASM Losses

(Photo credit: TSMC)

Market speculation has been swirling that global memory giant Micron is evaluating a potential acquisition of PSMC’s new 12-inch fab in Tongluo, Miaoli, Taiwan. According to Commercial Times, PSMC says it is in ongoing discussions with multiple potential partners, though any cooperation remains at the discussion stage. As the report indicates, these talks are not limited to a “fab acquisition,” but also include other structures such as strategic alliances and technology cooperation. The company adds that before any agreement is finalized, it will continue to advance expansion plans at the Tongluo fab, including capacity investments in silicon interposers and 3D IC technologies.

Tongluo Fab Gains Spotlight for Capacity Expansion Potential

The Tongluo fab is one of PSMC’s key investments in recent years. As the report notes, the site is planned to host three 12-inch wafer fabs, each with a monthly capacity of about 40,000 wafers, for a combined total of up to 120,000 wafers per month at full utilization. As the report highlights, construction of the first fab building has been completed, but installed capacity currently stands at only around 8,000 wafers per month. The facility remains in the market introduction and customer mass-production qualification phase and has yet to reach economic scale.

Industry sources cited by the report say the Tongluo fab has attracted market attention precisely because it is a newly built 12-inch facility with significant expansion potential. Compared with existing production lines, a new fab offers greater strategic flexibility, allowing potential partners to scale investment gradually based on demand.

For now, PSMC is planning new products at the Tongluo fab. According to the report, capacity for silicon interposer–related production lines stands at around 2,500 wafers per month and is currently fully utilized, with further expansion already planned. Meanwhile, 3D AI stacking technologies remain in the validation and customer proof-of-concept stage and are positioned as part of the company’s mid- to long-term development roadmap.

Geopolitics and Capacity Considerations Drive Speculation

As for the factors shaping market speculation around potential partners for PSMC’s Tongluo fab, institutional investors cited by the report say geopolitical tensions and supply-chain diversification efforts are driving global memory makers to seek “non-China” capacity, with Taiwan emerging as an attractive option. As the report points out, Micron’s Taiwan operations are centered in Taichung, and the company has HBM production capacity in Taiwan, giving it an established manufacturing footprint and comprehensive technical support infrastructure.

Read more

• [News] China Diversification Reportedly Lifts Mature-Node Foundries UMC, VIS, PSMC Despite Tariff Delay
• [News] Micron, SanDisk Reportedly Turn to PSMC to Fast-Track Memory Output Amid Tight Supply

(Photo credit: I Domain Industrial)

With memory prices surging, PC makers are accelerating price increases. Dell is said to have kicked off the latest round by lifting prices across its commercial portfolio from December 17, with increases ranging from 10% to 30%, as reported by Business Insider.

Notably, ASUS is now poised to follow suit, becoming the first PC vendor to raise prices in the new year, with the adjustment set to take effect on January 5, 2026, according to a notice obtained by industry sources.

ASUS explained in the notice that structural shifts in the global supply chain are driving unprecedented cost pressure on key components — especially memory (DRAM) and storage such as NAND and SSDs. The company attributed the increase to capacity realignments, heavier spending on advanced processes, and booming AI demand, which together are creating a structural supply gap now rippling through system costs across the industry.

The company said it will begin rolling out targeted price adjustments across parts of its product portfolio starting January 5, 2026, in a move aimed at safeguarding supply stability and maintaining product quality.

The move may be arriving slightly ahead of schedule, but it is hardly unexpected. As reported earlier by Commercial Times, Taiwan’s Acer and ASUS have both acknowledged that passing on soaring memory costs has become an industry-wide consensus. The market now widely expects that, starting January 2026, the MSRP for both consumer and business PCs will fully reflect the rising component costs, the report added.

ASUS Co-CEO Samson Hu told Commercial Times that memory prices are unlikely to ease before the first half of next year, reinforcing the rationale behind the price adjustments. He added that ASUS plans to dynamically adjust its product mix, specifications, and pricing based on market conditions, channel demand, and consumer needs, taking action at the most strategic moment.

Rising Memory Costs Threaten Notebook Shipments

The impact of rising memory costs on PC prices is one to watch closely. TrendForce’s latest analysis shows that, amid a sluggish economic recovery and cautious consumer spending, surging memory prices are squeezing notebook brands’ profit margins and limiting their pricing flexibility. As a result, TrendForce has revised its 2026 global notebook shipment forecast, now projecting a 5.4% year-on-year decline — down from the previous estimate of a 2.4% drop — totaling roughly 173 million units.

If memory price increases fail to ease significantly by the second quarter of 2026, and brands are unable to fully pass on higher costs, demand for entry-level and consumer notebooks could weaken further. Under this scenario, TrendForce warns that full-year 2026 shipments could fall as much as 10.1% year-on-year.

Read more

• [News] Acer and ASUS Reportedly to Pass Surging Memory Costs to PCs in 1Q26, Hot on Dell’s Heels
• [News] Dell Reportedly Plans 10–30% Hikes on Commercial PCs From Dec. 17 as Memory Prices Surge
• [Exclusive] Memory Crunch Hits PCs: Dell Hikes Prices 15-20% Mid-December, Lenovo from January 2026

(Photo credit: ASUS)

As 2025 draws to a close, major technology companies have continued to reshape their workforces amid shifting market conditions, cost pressures, and accelerating investments in AI. Below is a roundup of notable layoffs announced throughout the year, highlighting how some of the industry’s biggest players adjusted staffing as part of broader restructuring efforts.

1. Google Reportedly Trims Workforce Across Design, Platforms, and Devices

In October, Google cut more than 100 positions tied to design-related functions, CNBC notes. The layoffs followed earlier workforce reductions this year, including cuts affecting hundreds of employees in the platforms and devices unit in April, TheStreet.com notes, as well as a February round that impacted staff in Google’s cloud and human resources teams.

2. Meta Reportedly Cuts 5% of Workforce in 2025, Eyes Deep Metaverse Cuts in 2026

In January 2025, Meta unveiled plans to cut roughly 5% of its workforce—around 3,600 employees, Reuters notes. Looking ahead to 2026, CEO Mark Zuckerberg is reported to significantly scale back resources devoted to the metaverse, with Bloomberg noting that potential budget cuts could reach as much as 30%.

3. Amazon Reportedly Axes 14,000 Corporate Roles, Extends Cuts to Europe

In October, Amazon confirmed plans to lay off about 14,000 corporate employees as part of sweeping organizational changes, CRN reports. The company followed up in December by announcing the elimination of 370 jobs at its European headquarters in Luxembourg, marking its largest-ever workforce reduction at the site, as noted by The Times of India. The Luxembourg cuts form part of a broader cost-reduction drive under CEO Andy Jassy, aimed at making Amazon leaner and less bureaucratic while continuing to ramp investment in generative AI.

4. Microsoft Reportedly Cuts ~15,000 Jobs as AI Reshapes Strategy

Microsoft has eliminated around 15,000 jobs so far in 2025, with the most recent round in July cutting roughly 9,000 roles, CNBC notes. CEO Satya Nadella said in a memo to employees that the company needs to “reimagine” its mission for a new era, while underscoring the growing importance of AI to its future strategy.

5. Intel Reportedly Cuts More Than 3,000 Jobs in 2025

According to Oregon Live, Intel laid off another 669 employees in Oregon in November, bringing its total local job cuts to more than 3,000 for the year—a move aligned with the company’s broader restructuring. As noted by CRN, Intel said in its second fiscal quarter 2025 earnings report that it is in the process of reducing about 15% of its workforce under a previously announced plan to create a faster-moving, flatter, and more agile organization.

6. Applied Materials Reportedly Cuts About 4% of Global Workforce

Chip equipment maker Applied Materials is cutting about 4% of its global workforce, with the company beginning to notify affected employees worldwide “across all levels and groups,” according to an October filing cited by CNBC. The report notes that Applied Materials had roughly 36,100 full-time employees as of an August 2025 disclosure, implying the reduction would affect about 1,400 workers.

7. HP Reportedly Cuts Jobs as Tariffs and PC Competition Weigh

In late February, HP said it planned to cut up to 2,000 jobs and incur roughly $150 million in restructuring costs, CRN notes. The move came as the company prepared for headwinds from tariffs as well as intensifying competition in the PC market.

8. HPE Reportedly Cuts 5% of Workforce

As CRN reports, Hewlett-Packard Enterprise said in March that it plans to cut about 5% of its workforce—roughly 2,500 employees—over the next 12 to 18 months, with an additional 500 roles expected to be eliminated through attrition.

Read more

• [News] Baidu Reportedly Launches Its Biggest Layoffs in Years as It Overhauls Its AI Business
• [News] Intel Layoffs Escalate: 5,000 U.S. Jobs Reportedly at Risk, Oregon Hit Hardest

(Photo credit: FREEPIK)

Memory prices are climbing, reportedly affecting the product planning of major game console makers. According to ITHome, citing Insider Gaming, sources say console manufacturers Sony and Microsoft are weighing whether to delay the next generation of consoles beyond their originally targeted 2027–2028 launch window. Even if the next-generation consoles are ultimately released, the report adds that their launch prices could be significantly higher than those of previous generations.

RAM prices have surged by several hundred percent in recent months amid booming AI demand. The report notes that console makers are considering delaying next-generation launches in hopes that memory manufacturers will have time to expand capacity, which could help ease RAM prices.

Beyond the potential impact on next-generation launches, the report indicates that rising memory costs could also lead to further price increases for current-generation consoles as early as 2026. As noted by Forbes, Sony has raised console prices once, while Microsoft has most recently increased the price of models such as the 2TB Xbox Series X to as much as $800—a move that, together with earlier price hikes, has contributed to a sharp drop in Xbox hardware sales.

Rising Memory Costs Weigh on Game Console Outlook

TrendForce notes that the rapid rise in memory prices is weighing on a range of consumer devices, including game consoles. As a result, TrendForce has revised its 2026 forecast for global game console shipments downward, widening the expected year-over-year decline from 3.5% to 4.4%.

According to TrendForce, Sony and Microsoft expect memory costs to account for more than 35% of total bill-of-materials (BOM) costs by 2026. This dynamic complicates the industry’s traditional mid-cycle price-cut strategy, particularly in the years following a console’s launch, and could result in price increases in some regions to offset rising costs.

In addition, TrendForce indicates that the launch price of the Switch 2, at US$450, is higher than that of its predecessor due to a doubling of memory capacity and higher overall component costs. Memory modules for the Switch 2 are projected to make up 21–23% of total hardware costs in 2026, a factor that significantly compresses profit margins and limits Nintendo’s flexibility for future price reductions.

Read more

• Memory Price Surge Squeezes Game Console Margins; 2026 Shipment Forecast Revised Downward, Says TrendForce
• Memory Price Surge to Persist in 1Q26; Smartphone and Notebook Brands Begin Raising Prices and Downgrading Specs, Says TrendForce

(Photo credit: Microsoft)

As the HBM4 race heats up, earlier reports from outlets like SeDaily indicate that both Samsung Electronics and SK hynix have started delivering paid final HBM4 samples to NVIDIA. Riding the wave of strong demand, Etnews reports that Samsung plans to ramp up its HBM production capacity by 50% in 2026.

While Samsung remains tight-lipped on specific plans to meet surging demand, Etnews reports the company aims to boost HBM production to around 250,000 wafers per month by the end of 2026—a roughly 47% increase from the current 170,000 wafers.

For context, the report explains that Samsung’s current capacity is roughly on par with SK hynix at 160,000–170,000 wafers per month, though actual output has lagged due to challenges in meeting the demand from NVIDIA.

According to Etnews, Samsung’s investment will involve converting existing lines and expanding the new Pyeongtaek 4 (P4) line. The report cites sources saying major facility investments could begin as early as next month, with key HBM manufacturing equipment reportedly in the final stages of testing.

Another source notes that Samsung’s recent HBM investment is centered on HBM4. SeDaily reported earlier that Samsung, along with SK hynix, has begun delivering paid final samples to NVIDIA, signaling performance is close to customer specs and negotiations are in a pre-contract phase. The final hurdle remains quality qualification, with volumes and pricing expected to be set in Q1 2026.

TrendForce adds that a definitive outcome will only become clear in the mid-to-late part of the quarter, once contracts are formally finalized.

Amid rising prices across both its DRAM and NAND lines, Samsung is staging a strong comeback from earlier challenges, set to close 2025 well above market expectations. According to the Korea Economic Daily, internal projections for Q4 indicate an operating profit exceeding KRW 20 trillion—over $14 billion at current exchange rates—about 30% higher than the average analyst forecast.

SK hynix Gears up for HBM4 Production

On the other hand, according to The Elec, SK hynix will start commercial production at its new M15X fab four months ahead of schedule, kicking off 1b DRAM output for HBM4 in February.

The fab was originally set for wafer insertion in June, the report notes, with initial production expected at around 10,000 wafers per month and plans to scale severalfold by the end of 2026.

Read more

• [News] SK hynix, Samsung Reportedly Deliver Paid HBM4 Samples to NVIDIA Ahead of 1Q26 Contracts
• [News] Samsung HBM4 Reportedly Beats Expectations in Broadcom Test, Set to Lead 2026 Google TPU Supply

(Photo credit: Samsung)

Although the U.S. has delayed the implementation of China chip tariffs, supply chains continue to shift away from China over the long term. According to Commercial Times, mature-node chips—given their broad range of applications and long product life cycles—are among the first to be incorporated into geographic diversification and second-source planning. Taiwanese foundries such as UMC, VIS, and PSMC are therefore expected to be key beneficiaries of order shifts.

Industry sources cited by the report indicate that in the automotive, industrial control, and power management sectors, international IDMs and system makers have already incorporated non-China supply sourcing strategies into their product and procurement plans for 2025–2027, aiming to mitigate the impact of future policy uncertainties on costs and delivery timelines.

UMC Emerges as a Key Beneficiary of Mature-Node Supply Shifts

Against this backdrop, Taiwan’s mature-node foundries have once again come under market scrutiny. As the report highlights, Taiwan’s second-largest foundry, UMC, is positioned to benefit. The report points out that UMC continues to advance the expansion of its 12-inch fab in Singapore, which is expected to enter mass production in 2026. The Singapore capacity offers a “non-China, non-U.S.” geopolitical advantage aligned with customers’ supply-chain diversification efforts and has already been incorporated into the mid- to long-term planning of some clients.

Notably, according to TrendForce, in 3Q25, UMC ranked fourth in global foundry revenue. Modest restocking in mature-node processes lifted overall utilization, driving revenue up 3.8% QoQ to nearly US$1.98 billion and giving UMC a 4.2% market share.

VIS Positioned to Gain From Non-China Supply Chain Shifts

TSMC’s affiliate, VIS, has also drawn market attention. As the report notes, VIS focuses on 8-inch and 12-inch mature-node manufacturing, with products spanning automotive, industrial control, and consumer electronics applications, and is working with international IDMs to advance the VSMC project in Singapore. Industry sources state that as customers increasingly demand non-China supply sources, VIS’s overseas capacity expansion is strengthening its strategic position in the mature-node foundry market.

PSMC Faces Opportunity in Mature-Node Supply Shifts

As for PSMC, the report indicates that while its operating structure differs from that of the aforementioned peers, it still has room to capture demand driven by supply-chain diversification in specific process technologies and targeted applications. As the report highlights, the market’s focus is on whether adjustments to its process platforms and customer mix will allow it to penetrate applications—such as automotive and industrial control—where demand for non-China sourcing is particularly strong.

Separately, PSMC is also expected to benefit from its strength in memory-related technologies. According to Economic Daily News, NVIDIA has teamed up with AI startup Groq to accelerate the development of SRAM-based language processing units (LPUs). The report adds that PSMC controls key SRAM manufacturing capacity and is securing orders from major SRAM design houses, positioning it as a major beneficiary of this trend.

Read more

• [News] Micron, SanDisk Reportedly Turn to PSMC to Fast-Track Memory Output Amid Tight Supply
• [News] UMC Licenses imec’s iSiPP300 to Advance Silicon Photonics, Eyes 2026–27 Risk Production

(Photo credit: UMC)

With the U.S.’s VEU (Validated End User) designation for Samsung and SK hynix in China expiring December 31, 2025, the potential impact on the memory giants’ operations is drawing close scrutiny. According to Hankyung, the companies have avoided the worst-case scenario, as the U.S. will now permit equipment shipments under an annual review system.

First reported by Bloomberg in September, the U.S. Commerce Department proposed a “site license” plan to Korean officials under this system, replacing the indefinite authorizations previously granted to Samsung Electronics’ Xi’an NAND fab and SK Hynix’s Wuxi DRAM and Dalian NAND facilities.

According to Hankyung, companies must pre-submit the types and quantities of semiconductor equipment they need for the year, with the U.S. government reviewing these requests to grant export approvals.

Though this system reportedly reduces the risk of a full VEU revocation, the report notes that the U.S. government estimates removing Samsung Electronics and SK hynix’s Chinese fabs from the VEU list could require up to 1,000 export approvals annually. Even with the new annual approval system, industry observers cited in the report warn that operational uncertainties persist, as companies may struggle to accurately forecast the types and quantities of equipment and components they will need.

Additionally, the revision does not alter Washington’s stance. According to Hankyung, the U.S. government is reportedly maintaining its policy of prohibiting equipment exports for plant expansions or upgrades in China. Thus, as Global Economic points out, Korean chipmakers are pivoting from expansion to survival in China, as they are now prioritizing yields on legacy processes over fab upgrades.

Samsung and SK hynix’s China Footprint

According to TrendForce, around 30–35% of Samsung’s total NAND output is expected to come from China in 2025. For SK hynix, roughly the same share of its DRAM output will come from China, while the country plays an even larger role in NAND production, projected to contribute 40–45% of its total NAND output that year.

Business Post reports that Samsung currently produces an estimated 270,000 NAND wafers per month across its Xi’an 1 and 2 plants, while SK hynix’s Dalian facility turns out about 100,000 wafers monthly.

Meanwhile, Hankyung notes that SK hynix’s Wuxi factory is not expected to undergo major process transitions in 2026, such as a shift to 1b DRAM, following the rollout of the 10nm-class 4th generation (1a) DRAM line starting in 2024. Under the current strategy, legacy DRAMs—like 1z and 1a—will continue to be produced at Wuxi, while cutting-edge lines, including 1b and 1c DRAMs, are reserved for SK hynix’s Icheon and Cheongju facilities, the report adds.

Read more

• [News] TSMC Dismisses Nanjing Risks as VEU Expires, Flags Global Advanced Capacity for Chinese Clients

(Photo credit: SK hynix)

TSMC senior vice president Wei-Jen Lo has moved to Intel, drawing industry attention over potential risks to sensitive advanced-process expertise, and new details are now emerging. According to Liberty Times, industry sources say investigators searched Lo’ s residence in late November, seized multiple boxes of materials, and found a substantial amount of confidential information related to TSMC’s advanced process technologies that are under development. The report says the materials were taken without authorization from TSMC, and there may be evidence of a violation of the National Security Act.

As the report notes, Lo holds U.S. citizenship and has settled in the country. It adds that if authorities later summon him for testimony and he fails to appear in accordance with the law, he could face compulsory detention and be placed on a wanted list. Meanwhile, the court has approved the seizure of Lo’s shares and real-estate assets, which industry estimates value at more than NT$20 billion.

In addition, sources cited by Taiwan Television Enterprise say TSMC has notified relevant supply-chain partners not to provide any confidential information to Lo and has comprehensively changed the project code names for its advanced-process programs to prevent him from gaining further access to internal advanced-process secrets.

TSMC Lawsuit and Intel’s Response

Lo retired from TSMC in late July this year and took on a vice president role at rival Intel by late October. According to Economic Daily News, TSMC confirmed that it filed a lawsuit with the Intellectual Property and Commercial Court on November 25, accusing Lo of breaching a non-compete agreement and misappropriating trade secrets by failing to disclose his move to the company.

As Liberty Times notes, TSMC states that for more than a year before his retirement, Lo had been reassigned to the role of senior vice president in the Corporate Strategy Development Division, where his responsibilities no longer required oversight or management of R&D operations. However, Lo continued to request meetings with R&D teams and sought access to materials to gain insight into advanced process technologies under development.

Amid the controversy, Intel has voiced its support for Lo. OregonLive reports that in late November, CEO Lip-Bu Tan reassured employees that the company acted responsibly in hiring Lo, said he “continues to have our full support,” and dismissed the allegations as “lacking merit,” pushing back against the new lawsuit from the Taiwanese foundry giant.

Read more

• [News] Intel Stands Firm on Lo Hire Amid TSMC Trade Secret Dispute: CEO Vows Support, Dismisses Claims
• [News] Ex-TSMC SVP Wei-Jen Lo Moves to Intel: Sub-2nm Data Leak Concerns and TSMC Strategy in Focus

(Photo credit: ITRI)

With markets staying muted over the Christmas holiday, NVIDIA made an unexpected move, agreeing to spend about $20 billion in cash to license Groq’s LPU (Language Processing Unit) technology. As highlighted by the Commercial Times, the deal signals that the AI chip leader is accelerating its push beyond traditional GPU architectures, with implications extending to how SRAM (Static Random Access Memory) is being rethought for edge AI.

While speculation continues over how NVIDIA will ultimately deploy the technology, Commercial Times reports—citing SRAM EDA tool provider iSTART—that Computing-in-Memory (CIM) chips are increasingly replacing portions of DRAM with SRAM, a design approach already adopted by Groq’s LPU. Notably, the report also flags MediaTek as another player to watch in the SRAM game, noting that its flagship Dimensity 9500 smartphone chip adopts a processing-in-memory NPU architecture.

Why SRAM Matters

As Commercial Times explains, SRAM is typically integrated within logic processes (on-chip) and supplied by foundries such as TSMC and Samsung. While it delivers superior performance and ultra-low latency, SRAM comes with trade-offs: lower integration density, higher power consumption than DRAM, and substantial die area requirements. For this reason, SRAM is often used as cache memory between processors (CPUs) and main memory, providing rapid response times for applications like L1 and L2 CPU caches.

SRAM’s advantages also extend to AI applications. According to the Economic Daily News, Groq has designed its chips without relying on external HBM, shielding them from memory supply shortages. By integrating SRAM directly on-chip, the architecture helps accelerate interactions between chatbots and other AI models, the report adds.

SRAM’s Expanding Role in AI Inference Chips

A growing number of AI inference chips and CIM architecture processors are now substituting SRAM for portions of DRAM to unlock faster access speeds and dramatically lower refresh latency, according to Commercial Times. Groq’s LPU stands as a prime example, reportedly packing a massive 230MB of SRAM onto a single chip with on-chip memory bandwidth reaching up to 80TB/s—effectively sidestepping the bandwidth bottlenecks that plague traditional DRAM and external memory.

MediaTek has taken a similar approach with the Dimensity 9500’s ultra-efficient NPU, which debuts a processing-in-memory architecture enabling AI models to run persistently. Industry analysts cited by the report note that while SRAM carries a higher total cost of ownership, it slashes data transfer latency in AI inference workloads. For edge AI devices in particular, this translates into fewer DRAM modules required and more compact system designs, the report suggests.

According to Commercial Times, these developments signal a broader shift: ASIC architectures embedding massive amounts of SRAM are gradually emerging, prompting a fundamental reassessment of the once-unchallenged HBM pathway.

Read more

• [News] Samsung Emerges as Potential Second Foundry for NVIDIA Alongside TSMC After Groq Licensing Deal
• [News] NVIDIA Reportedly Denies USD 20B Groq Acquisition Rumors

(Photo credit: MediaTek)

According to Xinhua News Agency, researchers at Shanghai Jiao Tong University (SJTU) have recently made a major breakthrough in next-generation optical computing chips, successfully realizing—for the first time—an all-optical computing chip capable of supporting large-scale semantic generative models. The research results were published on December 19 in Science.

As deep neural networks and large-scale generative models continue to evolve rapidly, the resulting demand for ultra-high computing power and energy efficiency has exposed a widening gap in the performance growth of conventional chip architectures. Against this backdrop, emerging paradigms like optical computing have increasingly gained traction.

“Optical computing can be understood as replacing electrons in transistors with light propagating through a chip, using changes in optical fields to perform computation,” said Chen Yitong, corresponding author of the paper and assistant professor at the School of Integrated Circuits, SJTU. “Light inherently offers advantages in speed and parallelism, making it a promising path to overcoming bottlenecks in computing power and energy consumption.”

However, Chen noted that applying optical computing to generative AI is far from straightforward. Existing all-optical computing chips are largely confined to small-scale classification tasks, while opto-electronic cascading or multiplexing significantly undermines the speed advantages of optical computing. How to enable next-generation optical chips to run complex generative models has thus become a widely recognized challenge in the global intelligent computing community.

To address this challenge, Chen’s research group proposed and demonstrated LightGen, an all-optical large-scale semantic generative chip. Experimental results obtained under stringent performance evaluation standards show that even when paired with relatively lagging input devices, LightGen delivers computing power and energy efficiency improvements of two orders of magnitude over state-of-the-art digital chips.

The team attributes this performance leap to three key breakthroughs achieved simultaneously on a single chip: the integration of millions of optical neurons on-chip, all-optical dimensional transformation, and a ground-truth-free optical training algorithm for generative models. Together, these advances make end-to-end all-optical implementation for large-scale generative tasks feasible.

According to the researchers, LightGen is capable of completing a full closed loop of “input–understanding–semantic manipulation–generation,” enabling high-resolution (≥512×512) image semantic generation, 3D generation (NeRF), high-definition video generation, and semantic control. It also supports a range of large-scale generative tasks, including denoising as well as local and global feature transfer.

“LightGen blazes a new pathway for next-generation optical computing chips to empower cutting-edge artificial intelligence,” Chen said, “and provides a fresh research direction for exploring faster and more energy-efficient generative intelligent computing.”

(Photo credit: FREEPIK)

As China accelerates its push for chip self-reliance, EDA — often called the “mother of chips” — is moving into the spotlight. According to EE Times China, Shanghai-based Univista filed for IPO guidance on December 26, marking a key milestone for the five-year-old domestic EDA firm’s entry into the capital markets.

According to TrendForce, Synopsys, Cadence, and Siemens EDA accounted for 32%, 29%, and 13% of the market in 2024 — a combined share of 74% globally. EE Times China suggests that their combined market share in China exceeds 80%.

As highlighted by EE Times China, while the global EDA industry remains dominated by U.S. and European giants, Univista is viewed as the only domestic Chinese vendor able to cover the full digital chip verification flow, the complete DFT (Design-for-Testability) process, and high-speed interconnect IP for advanced nodes. Its portfolio now spans digital EDA tools, system-level solutions, and high-end IP, the report adds.

Notably, the report points out that Univista’s founding team hails from leading international EDA firms such as Synopsys and Cadence. Since its founding five years ago, the company has moved at an unusually fast pace, launching nearly 40 products, the report notes.

The company’s latest launch, the AI-driven UniVista DesignAssistant, is China’s first product to merge large-scale AI models with a self-developed EDA engine, according to EE Times China. Earlier, in June, Univista also announced it had successfully powered on and validated an HBM3/E test chip, achieving data transfer speeds of up to 9,600 MT/s at standard voltage.

According to EE Times China, Univista’s IPO push comes at a particularly favorable moment for China’s domestic EDA industry. The report notes that the local EDA market is booming, having reached USD 1.52 billion in 2023 and projected to exceed USD 2.5 billion by 2025. At the same time, supported by national policies, the adoption of domestic EDA tools is accelerating, expanding coverage from 28nm toward 14nm nodes, while demand from Chinese chip designers for homegrown solutions is rising sharply, the report adds.

Univista’s IPO is just one sign of China’s push for EDA self-reliance. According to ijiwei, leading domestic EDA player Empyrean this month co-founded Tianjin Zhongwan Xinsheng Management Consulting Partnership, committing RMB 110.01 million, with Empyrean contributing RMB 100 million for a 90.9% stake. The company said the move aims to support its strategic growth and expand its footprint in the EDA sector.

Read more

• [News] Huawei-Related Firms Spur China’s Chip Buildout Across Materials, Photoresist, and EDA
• [News] SiCarrier Subsidiaries Reportedly Launch China’s Fully Independent EDA, 3nm Test Equipment

(Photo credit: Univista)

Samsung recently unveiled the Exynos 2600 built on its in-house 2nm GAA process, signaling a renewed push in advanced manufacturing and a long-term effort to reduce reliance on Qualcomm, a shift expected to accelerate with next-gen Exynos. According to Wccftech, sources say the company is developing a proprietary GPU for the Exynos 2800.

Once Qualcomm’s agreement with Samsung expires, Samsung is expected to ramp up Exynos production and deploy its in-house chips across most of its smartphone lineup, according to Wccftech. Rising Qualcomm chip costs further support this possibility, with the report noting that the Snapdragon 8 Elite Gen 5 is estimated to cost around US$280 per unit, while the Snapdragon 8 Elite Gen 6 could exceed US$300 next year. However, Wccftech also points out that Samsung’s first major challenge will be improving its manufacturing yields.

Analysts cited by the report believe that advancing in-house CPU and GPU designs will allow Exynos to take on a more prominent role. On Samsung’s potential custom CPU plans, Wccftech notes that the company has reportedly set up a dedicated unit focused on developing in-house solutions to compete with Apple and Qualcomm, and the Exynos 2800 may be the first chipset to feature these capabilities.

Samsung Reportedly Accelerates Push Toward In-House GPU Development

As for GPU development, Samsung has relied on AMD’s GPUs from the Exynos 2200 through the Exynos 2500. However, sources cited by Sammy Fans suggest the company could bring its GPU in-house with the Exynos 2800 as early as 2027, with the chip expected to power the Galaxy S28 series in 2028. The report also adds that Samsung may look to extend its Exynos GPU roadmap into areas such as smart glasses, autonomous vehicle chips, and humanoid robots.

Amid its push toward in-house GPU development, Sammy Fans notes that the Exynos 2600 features the Xclipse 960 GPU based on AMD’s RDNA4 architecture. While the chip marks Samsung’s first step toward greater in-house GPU involvement, Sammy Fans points out that the underlying GPU architecture for the Exynos 2600 still comes from AMD. However, the report adds that this could change in the near future as Samsung explores ways to develop its own GPU architecture.

At present, only a small number of companies develop proprietary GPU, including NVIDIA, AMD, Intel, Apple, and Qualcomm, according to Yonhap News. While Samsung Electronics has its own mobile application processor, Exynos, the report notes that its GPUs have so far relied on external intellectual property from other vendors.

The company’s push to develop proprietary GPUs is also reflected in recent hiring, as Samsung continues to recruit GPU veterans to strengthen its in-house capabilities. According to Sammy Fans, Samsung has hired John Rayfield, a former AMD executive with deep experience in graphics and computing, as Senior Vice President at the Advanced Computing Lab (ACL) and the Samsung Austin Research Center (SARC), where he will focus on advancing future Exynos chips and in-house GPU technologies.

Read more

• [News] Samsung Unveils Exynos 2600: Industry-First 2nm GAA AP With 113% AI Performance Uplift
• [News] Samsung Reportedly Cuts Exynos 2600 Price by $20–30 Below Qualcomm to Spur Adoption

(Photo credit: Samsung)

As SK hynix continues to advance next-generation memory, the company is also reportedly moving to build capabilities in cutting-edge packaging technologies. According to ZDNet, sources say SK hynix is preparing to set up its first 2.5D packaging mass-production line at a new U.S. packaging facility in West Lafayette, Indiana. 2.5D packaging improves chip performance and power efficiency by placing a thin silicon interposer between the semiconductor and the substrate, the report adds.

As the report notes, the West Lafayette packaging plant will be SK hynix’s first manufacturing facility in the U.S. and is intended to serve as an advanced packaging production hub for AI memory. The company is targeting the second half of 2028 for the start of operations and has announced plans to invest US$3.87 billion (around KRW 5.4 trillion) in the project.

2.5D Packaging Capabilities Could Redefine AI Supply Dynamics

2.5D packaging is a critical process for integrating HBM with high-performance system semiconductors, the report notes. It adds that NVIDIA’s high-performance AI accelerators are built by combining HBM with GPUs and CPUs through 2.5D packaging, making the technology central to advanced AI chip design.

To receive usage approval from NVIDIA, the report notes that quality validation must cover not only the HBM itself but also the 2.5D packaging process. This requirement means that any weaknesses in packaging can delay product timelines, even if the memory itself meets reliability standards. The report also notes that by further strengthening its technological capabilities, SK hynix could move toward a turnkey business model that offers customers both HBM and packaging in a single, integrated solution.

Against this backdrop, the report points out that SK hynix’s push to establish a 2.5D packaging mass-production line is part of a broader strategy to strengthen its overall AI semiconductor packaging capabilities, including HBM. If the company secures both the technology and large-scale manufacturing capacity for 2.5D packaging, the report adds, the move could significantly reshape the AI chip supply chain.

2.5D Packaging Seen as Key to SK hynix’s Commercial Expansion

SK hynix has been conducting in-house research and development on 2.5D packaging for an extended period. However, the report indicates that the company currently lacks sufficient domestic equipment to carry out the full 2.5D packaging process at mass-production scale. The report also points out that 2.5D packaging for AI accelerators is effectively dominated by TSMC.

While SK hynix has basic 2.5D packaging technology and equipment in place, sources say it remains difficult to support the large-scale system-in-package (SiP) tools required for AI accelerators integrating HBM. As a result, SK hynix views securing in-house facilities capable of performing 2.5D packaging for its own HBM as a key priority, with the aim that once the technology stabilizes and is further refined, the company can pursue business expansion beyond R&D.

SK hynix stated that it is exploring various options regarding the utilization of the Indiana fab, but nothing has been finalized at this stage.

Read more

• [News] SK hynix Reportedly Expands U.S. Footprint with New Seattle Office Near NVIDIA and Amazon
• [News] SLC-Based AI SSDs Gain Traction as SK hynix and Kioxia Accelerate Development With NVIDIA

(Photo credit: SK hynix)

While mature-node foundries, led by SMIC, have sparked a new wave of price hikes, TSMC is reportedly joining the trend. According to the Economic Daily News, the company has notified clients that it will raise prices for advanced nodes consecutively from 2026 through 2029, with the new 2026 rates taking effect on January 1.

The report highlights that TSMC is riding the AI boom, which is tightening capacity in its sub-3nm nodes. Notably, the Economic Daily News suggests that the 2026 price hikes are expected in the single-digit percentage range. Analysts and research firms cited by the report anticipate TSMC’s advanced node prices will rise 3%–10% in 2026, varying by node, but all projected to surpass 2025 levels.

Riding this momentum, the report notes that the price hikes could bolster TSMC’s traditionally slow first-quarter performance, potentially keeping results flat or even slightly above the previous quarter, challenging its strongest-ever Q1. Analysts cited by the report attribute this resilience to new platform launches from major clients like NVIDIA and AMD, as well as non-Apple customers such as Broadcom expanding AI applications.

According to Commercial Times, TSMC’s 2nm clients have a product roadmap stretching from the second half of 2025 through the second half of 2027, led by flagship offerings such as Apple’s M6 and M7, AMD’s Epyc Venice and MI450, Intel’s Nova Lake and Razor Lake and Google’s TPU v9, all lining up for production.

Read more

• [News] Price Hikes Hit Mature Nodes: SMIC, TSMC Affiliate VIS Reportedly Raise BCD Prices 10%
• [News] SMIC Reportedly Raises Prices by 10%, Memory Products Lead the Way

(Photo credit: TSMC)

Will Samsung emerge as an alternative to TSMC for manufacturing NVIDIA chips? A recent move by Team Green has raised that possibility. According to Commercial Times, AI chip startup Groq has entered into a non-exclusive licensing agreement with NVIDIA, with key members of the Groq team joining NVIDIA to help advance the licensed technology. Given Groq’s close foundry partnership with Samsung, industry sources say this development implicitly suggests that NVIDIA may be exploring a second foundry supplier—potentially challenging TSMC’s long-standing dominance in NVIDIA’s manufacturing supply chain.

Recently, Groq announced that it has entered into a non-exclusive licensing agreement with NVIDIA covering its inference technology. The financial terms were not disclosed, CNBC notes, although CNBC adds that NVIDIA has agreed to acquire assets from Groq for US$20 billion in cash, according to Alex Davis, CEO of Disruptive, who led Groq’s latest financing round in September.

Groq Deal Highlights Samsung’s Potential Role in NVIDIA’s Supply Chain

Institutional investors cited by Commercial Times say the transaction differs from a direct acquisition. By securing Groq’s core intellectual property (IP) and recruiting several senior executives, including founder Jonathan Ross, a former core developer of Google’s TPU program, NVIDIA is able to obtain the underlying technology while sidestepping potential antitrust scrutiny.

As highlighted by Commercial Times, Groq signed an agreement with Samsung in August 2023 to jointly mass-produce next-generation language processing units (LPUs), with sources saying the LPUs built on Samsung’s 4nm process have already entered mass production. As Groq’s technology is integrated into NVIDIA’s ecosystem, Samsung could emerge as NVIDIA’s “second supply source” alongside TSMC. For NVIDIA, Commercial Times notes that the partnership not only positions Samsung as a counterbalance to TSMC—strengthening NVIDIA’s bargaining power—but also helps the company build a competitive edge in the inference market.

In addition, Reuters notes that Groq is among a group of emerging AI chip startups that do not rely on external HBM, allowing them to avoid the memory crunch affecting the global semiconductor industry. Instead, the company uses on-chip memory known as SRAM, which helps speed up interactions with chatbots and other AI models but also limits the size of the model that can be served.

Samsung Accelerates U.S. Foundry Plans, Deepens NVIDIA Ties

Commercial Times also notes that Samsung Foundry is actively preparing U.S. manufacturing capacity, with its Taylor, Texas fab accelerating progress and aiming to have 2nm production capacity in the U.S. ready by the end of 2026—potentially ahead of TSMC. Industry sources add that Samsung may leverage its strengths in memory manufacturing and pricing to secure more opportunities to produce AI chips for NVIDIA. In addition, Commercial Times notes that Samsung has recently also delivered SOCAMM2 samples to NVIDIA.

Read more

• [News] SOCAMM2 War Heats Up: Samsung Reportedly Delivers Samples to NVIDIA, Ramping Early 2026
• [News] NVIDIA Reportedly Denies USD 20B Groq Acquisition Rumors

(Photo credit: Groq)

Just before year-end, a magnitude-7.0 earthquake struck Taiwan at 11:05 p.m. on the 27th, with the epicenter off Yilan and seismic intensity reaching level four in Hsinchu City and County — heightening concerns over potential disruption to foundries and memory makers.

Commercial Times, citing TSMC, reports that a small number of fabs in the Hsinchu Science Park were evacuated after shaking reached preset safety thresholds. Supply-chain sources cited by the report added that TSMC’s production could return to near-full levels as early as the 29th, with only limited impact on full-year output and customer delivery schedules.

According to Liberty Times, total losses across the semiconductor sector could reach tens of billions of New Taiwan dollars. However, the report also notes that compared with the April 3 quake — which led TSMC to record around NTD 3 billion (USD 92.1 million) in earthquake-related losses after insurance — this event caused less severe damage due to its deeper focus. With Taiwan’s semiconductor sector able to mobilize rapidly, production is expected to resume within days, and widespread earthquake insurance should keep overall losses manageable, the report adds.

Meanwhile, according to Liberty Times, industry sources cited by the report estimate that total losses across the semiconductor sector could reach tens of billions of New Taiwan dollars.

TSMC’s Advanced Capacity in Focus

Liberty Times explains that TSMC’s 2nm, 3nm, and 5nm advanced nodes are mainly located in the Southern Taiwan Science Park and Kaohsiung, where seismic intensity from this quake was only level two to three and production was not affected.

By contrast, some of TSMC’s 12-inch fabs in central Taiwan and Hsinchu Science Park, as per Liberty Times, reportedly suffered damage to quartz furnace tubes, quartz boats, and in-process wafers, with sensitive tools taken offline for recalibration.

Analysts cited by Liberty Times note that TSMC’s key Hsinchu production lines include its 7nm and 5nm nodes, while Fab 20 in Baoshan is responsible for 2-nm mass production. While some tools may require recalibration, and a limited number of in-process wafers could be scrapped or held for inspection, the overall impact is expected to remain manageable, the report suggests.

Other foundries reported similar situations. According to Commercial Times, UMC said its 12-inch fabs in the Southern Taiwan Science Park saw limited impact, while its 8-inch Hsinchu fab has low capacity utilization. TSMC affiliate Vanguard International Semiconductor, on the other hand, confirmed all staff are safe and said fabs are recalibrating offline tools to resume production as quickly as possible, the report notes.

Memory Makers Assess Quake Damage

Liberty Times reports that a major memory fab in Taoyuan, northern Taiwan, sustained significant damage to quartz furnace tubes, causing broken or scrapped wafers. Sensitive tools also need recalibration, and debris must be cleared, with full production expected to take at least three to five days to resume. It remains unclear whether this will worsen the already tight memory supply, while fabs in central and southern Taiwan were less affected, the report notes.

PSMC acknowledged that its 8-inch and 12-inch fabs in Hsinchu and Zhunan were impacted, though to a lesser degree than during the April 3 quake, the report adds.

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• [News] TSMC Dismisses Nanjing Risks as VEU Expires, Flags Global Advanced Capacity for Chinese Clients
• [News] Japan Earthquake Impact: TEL and Rapidus Unharmed, Spotlight Turns to Kioxia Kitakami Fabs

(Photo credit: TSMC)

AI is reshaping the data center SSD market, with SLC-based AI SSDs gaining traction as a next-generation storage solution. According to ZDNet, data center SSDs have traditionally prioritized higher storage capacity, but major memory companies are now shifting toward SLC (single-level cell)–based designs to maximize data-processing performance.

The data center SSD market has traditionally been dominated by TLC and QLC technologies, as storing more bits per cell enables much higher data density per unit area. The report notes that demand continues to climb in AI data centers, where massive volumes of data must be processed, leading to increasing interest in SLC. However, it also notes that while SLC offers faster performance and greater reliability, it has long been viewed as impractical for large-scale data center deployments due to its limited capacity and higher costs.

SK hynix and Kioxia Accelerate SLC-Based AI SSD Development

As the report notes, SK hynix is developing its “AIN Family” lineup for the AI data center market, targeting three core dimensions: AI-N P (performance), AI-N B (bandwidth), and AI-N D (density). The company says AI-N P is being built on SLC NAND and is designed to efficiently handle massive data input and output in large-scale AI inference environments.

Notably, the report says the first-generation product delivers up to 25 million IOPS (input/output operations per second), roughly eight to ten times higher than current high-performance SSDs, which typically peak at around 3 million IOPS. The report adds that a second-generation version, targeted for readiness for mass production by the end of 2027, is expected to reach as high as 100 million IOPS.

NVIDIA Partnerships Drive Next-Gen AI SSD Development

To achieve these performance targets, SK hynix is redesigning both the NAND and the controller using a new architecture. As the report highlights, the company is also working closely with its key customer, NVIDIA, and plans to unveil the first samples by the end of 2026. Alongside SK hynix’s efforts, the report notes that Japan’s Kioxia plans to commercialize next-generation SSDs delivering 100 million IOPS in cooperation with NVIDIA by 2027, and the products are likewise expected to be based on SLC NAND.

NVIDIA has identified SLC NAND as a key enabler of next-generation AI storage, according to the report. The company is developing a software platform called SCADA (SCaled Accelerated Data Access) to support SLC NAND deployment. As the report notes, by bypassing conventional architectures—where data is first read from SSDs by the CPU before being passed to the GPU—SCADA shortens the data path and improves both training and inference speed and efficiency. The report adds that delivering NVIDIA’s SCADA solution requires a substantial leap in SSD performance, spurring major memory suppliers to race toward next-generation SSDs capable of exceeding 100 million IOPS.

HBF Emerges as SLC-Based AI Storage Technology

In addition, HBF (High Bandwidth Flash) is also being developed using SLC NAND. By stacking NAND dies, HBF significantly expands data-transmission bandwidth. SK hynix is currently working with SanDisk on standardization efforts, with a proof-of-concept (PoC) sample expected in 2027, followed by full-scale evaluation, the report adds.

Read more

• [News] SK hynix Reportedly Aims 100 Million IOPS with AI-NAND by 2027 in Collaboration with NVIDIA
• [News] SK hynix Reportedly Explores High-Bandwidth Storage Stacking NAND and DRAM

(Photo credit: SK hynix)

On December 24, CNBC reported that Alex Davis, CEO of U.S. technology investment firm Disruptive, claimed NVIDIA had agreed to acquire high-performance AI accelerator chip designer Groq in an all-cash deal valued at approximately USD 20 billion, triggering widespread industry attention.

Notably, on the same day the news surfaced, Groq announced on its official website that it had entered into a non-exclusive licensing agreement with NVIDIA, granting NVIDIA access to Groq’s inference technology.

According to Groq, the agreement reflects both parties’ shared commitment to expanding the adoption of high-performance, cost-efficient inference technologies. As part of the arrangement, Groq founder Jonathan Ross, President Sunny Madra, and other members of the Groq team will join NVIDIA to help advance and scale up the licensed technology.

Groq is a Silicon Valley–based AI chip startup founded by a team of former NVIDIA engineers. While Groq did not directly address CNBC’s acquisition report in its announcement, the company stated that it will continue to operate as an independent entity, with Simon Edwards serving as chief executive officer. In addition, GroqCloud will remain fully operational without interruption.

Meanwhile, Chinese media outlets including Yicai reported that NVIDIA responded to the acquisition rumors by clarifying that it has not acquired Groq, but has instead obtained a non-exclusive license to certain Groq intellectual property.

In its latest statement to Yicai reporters, NVIDIA said it has also recruited engineering talent from the Groq team, and that both sides will work together to deliver leading accelerated computing technologies.

(Photo credit: Groq)